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AR# 67356

Zynq UltraScale+ MPSoC: How to connect the JTAG signal of a Mictor (TRACE) connector


The Mictor Connector for TRACE support has 4 dedicated JTAG signals.

How should I connect them to a Zynq UltraScale MPSoC device?


The Mictor Connector for TRACE support has 4 dedicated JTAG signals:


Xilinx recommends connecting these signals to the PJTAG interface, which allows a third-party debugger to connect to the PS DAP through MIO signals.

See (UG1085) chapter 37 "System Test and Debug" for more details.

For example, you could decide to have the TRACE port routed via EMIO to PL pins (to save MIO pins) and have the TRACE_JTAG signals connected to PJTAG via MIO.

If the voltage is different between the TRACE and the TRACE_JTAG banks, you provide the correct voltage to the dedicated VREF pins on the Mictor:

  • Pin 12 VREF-TRACE (dedicated for TRACE)
  • Pin 14 VREF-DEBUG (dedicated for TRACE_JTAG)
AR# 67356
Date 06/23/2016
Status Active
Type General Article
  • Zynq UltraScale+ MPSoC
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