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AR# 67896

MIPI CSI-2 Transmitter Subsystem - Release Notes and Known Issues for the Vivado 2013.1 tool and later versions

Description

This answer record contains the Release Notes and Known Issues for the MIPI CSI-2 Transmitter (TX) Subsystem and includes the following:

  • General Information
  • Known and Resolved Issues
  • Revision History

MIPI CSI-2 Transmitter (TX) Subsystem Page:

https://www.xilinx.com/products/intellectual-property/ef-di-mipi-csi-rx.html

Solution

General Information

Supported Devices can be found in the following three locations:

For a list of new features and added device support for all versions, see the Change Log file available with the core in Vivado.

Version Table

This table correlates the core version to the first Vivado design tools release version in which it was included.

Table 1: Version

Core VersionVivado Tools Version IP Patches
v1.0 (Rev. 3)2017.2
v1.0 (Rev. 2)2017.1(Xilinx Answer 69173)
v1.0 (Rev. 1)2016.4
v1.02016.3

General Guidance

The table below provides Answer Records for general guidance when using the MIPI CSI-2 Transmitter (Tx) Subsystem.

Table 2: General Guidance

Article NumberArticle Title
(Xilinx Answer 69474)Why does the MIPI CSI-2 Transmitter Subsystem not send all of the data (Image data and/or Embedded non-image data) when a longer packet length setting is selected?

Known and Resolved Issues

The following table provides known issues for the MIPI CSI-2 Transmitter (Tx) Subsystem , starting with v1.0, initially released in Vivado 2016.3.

Note: The "Version Found" column lists the version the problem was first discovered. 

The problem might also exist in earlier versions, but no specific testing has been performed to verify earlier versions.

Table 3: IP

Article NumberArticle TitleVersion FoundVersion Resolved
(Xilinx Answer 69250)Why is the MIPI TX Clock/Data relationship not center-aligned for some line-rate configurations?v1.0 (Rev. 2)N/A

Revision History:

07/20/2017Added v1.0 (Rev. 3) to the Version Table and Added (Xilinx Answer 69474)
06/05/2017Added (Xilinx Answer 69250)
04/05/2017Added v1.0 (Rev. 1) and v1.0 (Rev. 2) to the Version Table
10/05/2016Initial Release

 

Linked Answer Records

Master Answer Records

Answer Number Answer Title Version Found Version Resolved
56852 Xilinx Multimedia, Video and Imaging Solution Center - Top Issues N/A N/A

Child Answer Records

Associated Answer Records

AR# 67896
Date 08/01/2017
Status Active
Type Release Notes
Devices
  • Zynq UltraScale+ MPSoC
  • Virtex UltraScale+
  • Kintex UltraScale+
IP
  • MIPI
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