We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome,
Internet Explorer 11,
Safari. Thank you!
AR# 68293: 2018.1 Vivado IP Flows - write_hwdef and write_sysdef do not write out software drivers from a subcore in a user IP block
2018.1 Vivado IP Flows - write_hwdef and write_sysdef do not write out software drivers from a subcore in a user IP block
I have packaged a project containing an HLS module.
Now when I use this new user IP in an IP Integrator design, write_hwdef and write_sysdef do not write out software drivers from the HDL subcore of the user IP block.
Below are the steps I used:
Use HLS to create an IP which delivers a Software driver
Instantiate an instance of the HLS IP into a project and verify that everything is working correctly
Package the project (top level design) which instantiates the HLS IP as a user IP
I then place this user IP from my original project in an IP Integrator block design
It seems "write_hwdef" and "write_sysdef" did not write out software drivers from the HLS subcore which had the software driver, and the software driver from the HLS IP is lost during bitstream generation.
IP Packager will not pick up a software driver from an HLS IP core when packaging a project containing the HLS IP core.
When packaging such a project, the user is responsible for bringing the drivers over manually.
In the IP Packager select IP File Groups
Right Click in the File Groups window and select "Add File Group ..."
Expand the Advanced section (Click "Show") at the bottom and select "Software Driver"
Once the "Software Driver" file group is added, right click it and select "Add files" then browse and select the desired software driver(s)