We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 7593

XPLA Architecture - JTAG pins with internal weak pull-up/down resistors


Do the JTAG pins have a weak pull-up/pull-down resistor when these pins are reserved for this function?


The weak pull-up/pull-down is not enabled when the JTAG function is implemented. The I/Os are simply 3-stated; therefore, it is advisable to implement a weak pull-up/pull-down resistor in your design. This will prevent the JTAG inputs from floating, which eliminates the chance that the CoolRunner would draw higher currents from the power supply.  


NOTE: The other 3-stated I/Os, by default, retain their weak pull-up/pull-down implementation as allowed by the features of that part.

AR# 7593
Date Created 08/21/2007
Last Updated 05/14/2014
Status Archive
Type General Article