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AR# 7604

CPLD CoolRunner - Do CoolRunner (XPLA3 or CoolRunner-II) devices have internal pull-up resistors?


Do CoolRunner devices have weak pull-up resistors on their I/Os?


CoolRunner XPLA3 devices have pull-up resistors on the I/O pins, which can be activated on a pin-by-pin basis for inputs only. CoolRunner-II devices also have pull-up resistors on the I/O pins. For further details, see (Xilinx Answer 14318). You can configure these in the Xilinx Constraints Editor or in a User Constraints File (UCF). The UCF syntax is as follows:

NET signalname PULLUP;

These pull-up resistors can also be used on unused I/O to prevent unused pins from floating:

- In the 5.1i software, this option is located under the "Fit" process -> "Basic" tab -> "Unused Pin Termination".

- In the 4.1i software, this option is located under the "Generate Programming File" process.

AR# 7604
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article