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AR# 7903

2.1i Trace - Timespecs are ignored on XC9500XL designs


Keywords: XC9500XL, trace, Timing Analyzer, Timing Analyser, TRCE, timespecs,
constraints, ignored, fail

Urgency: Standard

Problem Description:
1. In an XC9500XL design, a from:to constraint will be ignored on a path from the output of a
flip-flop, to the T-pin of a BUFT, through the BUFT, and onto a PAD via an OBUF.

2. Also, a "TIG" constraint will not be taken into account on a path that comes from the output
of a flip-flop, through an OBUFT (on the T-pin), and then to a pad.


If you replace the BUFT and OBUF with an OBUFT, the constraint will be analyzed correctly.
AR# 7903
Date Created 08/31/2007
Last Updated 07/27/2001
Status Archive