We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 8641

JTAG - How long after Program pin is released is the JTAG TAP available for Virtex, Virtex-E, and Spartan-II devices?


General Description:

How long after the Program pin is released is the JTAG TAP available when I configure a Virtex, Virtex-E, or Spartan-II device?


If you hold the Virtex PROG pin low, this will force the TAP into the Test-Logic-Reset (TLR) state.

The JTAG TAP is available immediately after the Program pin is released. At this time, the IDCODE instruction is loaded according to the JTAG standard. If a configuration instruction is to be loaded, wait 100 us to allow the device to finish clearing the configuration memory.

For more information, please refer to the Power-up Timing Characteristics in the data book for the appropriate device.

AR# 8641
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article