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AR# 9429

3.1i Virtex-E BitGen - A greater than .3 ns discrepancy is seen between the input clock of a DLL and the feedback path.


Keywords: DLL, Feedback, FB, Path, IOB, delay, difference

Urgency: Hot

General Description:
When probing the input of a global clock and its feedback pin on a clock DLL,
a discrepancy of over .3 ns has been seen between the two clock signals.


There is a problem in the Virtex-E BitGen equations. BitGen determined that
if a signal went from the DLLFB pin of a DLLIOB directly to the CLKFB pin of
a DLL, the DLL feedback connection was "on-chip" instead of "off-chip".
This created an improper clock de-skew of approximately 250 ps.

This change is available in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
Service Pack containing the fix is 3.1i Service Pack 1.
AR# 9429
Date Created 06/05/2000
Last Updated 11/09/2004
Status Archive
Type General Article