We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 9654

CPLD XC9500- XC9500 device (any density) fails to configure properly after power-up.



XC9500 device (any density) fails to configure (load) properly immediately following

power-up. What could be causing this?


Check the power supply ramp rate. Xilinx CPLDs, as well as all other CPLDs, will

configure properly only with a monotonic power supply. Xilinx has prepared an

application note titled 'XAPP144: Designing CPLD Multi-voltage Systems' which

completely reviews proper power-up requirements for the XC9500 device family. This

application note can be found at : http://www.xilinx.com/xapp/xapp144.pdf

Xilinx has found that some earlier XC9500 devices (with a date code prior to 0017)

have exhibited an additional sensitivity to non-monotonic power supplies. This

increased sensitivity, combined with the duration, profile, and monotonicity of the

power supply could cause the device to configure incorrectly. Devices with a date

code of 0017 or greater do not exhibit this additional sensitivity.

If you are experiencing configuration problems with any XC9500 device, please

contact your local Xilinx salesperson for appropriate device dispositioning and/or


AR# 9654
Date Created 08/21/2007
Last Updated 12/15/2012
Status Active
Type General Article