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AR# 9735

3.x FPGA Express - The STARTUP_SPARTAN2, BSCAN_SPARTAN2, and CAPTURE_SPARTAN2 primitives are not recognized

Description

Keywords: STARTUP, BSCAN, CAPTURE, SPARTAN2, Spartan-II, primitives, FPGA-LINK-2, FPGA-CHECK-4

Urgency: Standard

General Description:
I am attempting to instantiate any of the following Spartan-II primitives: STARTUP_SPARTAN2, BSCAN_SPARTAN2 or CAPTURE_SPARTAN2. However, when I attempt the instantiation, the following warning messages are reported in FPGA Express:

"Warning: Cannot link cell 'spartan2_primitives/u1' to its reference design 'startup_spartan2'. (FPGA-LINK-2)
Warning: Cannot link cell 'spartan2_primitives/u2' to its reference design 'bscan_spartan2'. (FPGA-LINK-2)
Warning: Cannot link cell 'spartan2_primitives/u3' to its reference design 'capture_spartan2'. (FPGA-LINK-2)
Warning: The cell '/spartan2_primitives/u1' is not linked to any design. (FPGA-CHECK-4)
Warning: The cell '/spartan2_primitives/u2' is not linked to any design. (FPGA-CHECK-4)
Warning: The cell '/spartan2_primitives/u3' is not linked to any design. (FPGA-CHECK-4)"

In spite of these warnings, the resulting netlist runs through the implementation tools without error.

Solution

The HDL code does not need to be modified. However, if you instantiate the Virtex counterparts of these primitives (STARTUP_VIRTEX, etc.), FPGA Express will not issue the warning messages, and the netlist will run through the implementation tools without any errors.

Please see (Xilinx Answer 7291) in the case of BSCAN_VIRTEX.
AR# 9735
Date Created 07/19/2000
Last Updated 08/11/2003
Status Archive
Type General Article