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AR# 9811

FPGA/Design Compiler - Spartan-XL design has an extra inverter on LDPE primitives during simulation

Description

Keywords: FPGA, Design, Compiler, sxnf, ldpe_1, ldpe, ngm, simulation

Urgency: Standard

General Description:
When doing a timing simulation on a Spartan-XL part from an FPGA Compiler
generated XNF (.sxnf) netlist, there will be an extra inverter added to all LDPE
primitives when using the .ngm file.

Solution

This problem has been found and will be fixed in the next 'quarterly' service pack.
The work around is to not use the .ngm file during timing simulation.
AR# 9811
Date Created 07/31/2000
Last Updated 08/29/2001
Status Archive
Type General Article