What are the I/O standard, drive strength, and slew rate for the dedicated configuration and JTAG pins?
All of these pins, in all device families except Virtex-II Pro and Spartan-3, are configured as LVTTL with 12 mA drive and fast slew rate. One exception is CCLK on Virtex-II devices, which is configured with a slow slew rate (LVTTL12S).
For Virtex-II Pro and Spartan-3, the dedicated configuration pins are LVCMOS25, 12 mA, Slow Slew.
For Spartan-3E, the dedicated configuration pins are LVCMOS25, 8 mA Slow Slew.
For Virtex-4 / Virtex-5, the dedicated configuration pins are LVCMOS 12 mA Fast Slew, where the voltage is determined by Vcc_Config.
1. The DONE pin (all families) is an open-drain driver by default. In this case, the output behavior is dictated by the pull-up resistor attached to it.
2. Not all configuration/JTAG pins are fully dedicated. If they are used as user I/O subsequent to configuration (e.g., /INIT can be configured as user I/O), you can determine the drive characteristics with the IOSTANDARD attribute (LVTTL12F by default, LVCMOS25 for Spartan-3 and Virtex-II Pro, by default). Refer to the "Pin Description" section of the appropriate device data sheet to determine which pins are fully dedicated and which pins can be used as user I/O.
3. To predict I/O behavior, an IBIS simulation is always necessary.
Use special care when creating a JTAG chain that contains a Spartan-3 family part with 3.3V parts. To allow Spartan-3 JTAG pins to interface with 3.3V signals, you must use current limiting resistors.
Refer to (Xilinx Answer 17102) for more information on 3.3V tolerance in Spartan-3 devices.
For Spartan-3A the drive strength changes with the VCCO voltage that is applied to the configuration bank.
For a voltage of 2.5V, the drive strength is 8 mA.
For a voltage of 3.3V, the "high" drive strength increases to 12 to 16 mA while the "low" drive strength remains at 8 mA.
This is all outlined further in the Spartan-3 Generation Configuration User Guide: