UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 9873

3.1i Virtex-E PAR - Placer rejects placement of slices containing F5/F6 muxes.

Description

Keywords: ERROR:Place:1802, F5/F6MUX, RPM, macro, XVR_NO_GRPRAM

Urgency: Standard

General Description:
A problem has been seen involving the use of a single F6MUX
which is packed into a slice with RAM. Map creates a route-thru
using the F6MUX in another slice and the F5MUX in the same
slice as the original F6MUX.

The placer then complicates matters by assembling a RAM macro that
contains only half of the F5/F6 route-thru mux pair. This leads to the
following error later in placement:

ERROR:Place:1802 - Components
asio1/uart2681/baud1/preload_value.I_51_f5_f6_I0_rt_sig and
asio1/uart2681/baud1/load_value_2_[4] are using the F5/F6MUX
resources. The components should be in a single common RPM. One
component is not in the RPM.

Solution

This problem is fixed in the latest 3.1i Service Pack available at:
http://support.xilinx.com/support/techsup/sw_updates. The first
service pack containing the fix is 3.1i Service Pack 4.

Meanwhile, you can work around the problem by setting the following
environment variable to prevent the placer from assembling RAM macros:

setenv XVR_NO_GRPRAM 1 (Work Stations)
set XVR_NO_GRPRAM=1 (PCs)
AR# 9873
Date Created 08/31/2007
Last Updated 10/21/2008
Status Archive
Type General Article