xtimebase_hw.h File Reference
This header file contains identifiers and register-level driver functions (or macros) that can be used to access the Xilinx MVI Video TimeBase device.
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#include "xio.h"
Go to the source code of this file.
Defines
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#define XTB_CTL 0x000
- Control.
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#define XTB_GH0 0x004
- Generator Horizontal Register 0.
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#define XTB_GH1 0x008
- Generator Horizontal Register 1.
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#define XTB_GH2 0x00C
- Generator Horizontal Register 2.
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#define XTB_GV0 0x010
- Generator Vertical Register 0.
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#define XTB_GV1 0x014
- Generator Vertical Register 1.
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#define XTB_GV2 0x018
- Generator Vertical Register 2.
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#define XTB_GV3 0x01C
- Generator Vertical Register 3.
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#define XTB_GV4 0x020
- Generator Vertical Register 4.
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#define XTB_GV5 0x024
- Generator Vertical Register 5.
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#define XTB_DS 0x028
- Detector Status Register.
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#define XTB_DH0 0x02C
- Detector Horizontal Register 0.
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#define XTB_DH1 0x030
- Detector Horizontal Register 1.
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#define XTB_DH2 0x034
- Detector Horizontal Register 2.
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#define XTB_DV0 0x038
- Detector Vertical Register 0.
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#define XTB_DV1 0x03C
- Detector Vertical Register 1.
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#define XTB_DV2 0x040
- Detector Vertical Register 2.
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#define XTB_DV3 0x044
- Detector Vertical Register 3.
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#define XTB_DV4 0x048
- Detector Vertical Register 4.
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#define XTB_DV5 0x04C
- Detector Vertical Register 5.
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#define XTB_FS00 0x050
- Frame Sync 00 Config Register.
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#define XTB_FS01 0x054
- Frame Sync 01 Config Register.
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#define XTB_FS02 0x058
- Frame Sync 02 Config Register.
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#define XTB_FS03 0x05C
- Frame Sync 03 Config Register.
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#define XTB_FS04 0x060
- Frame Sync 04 Config Register.
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#define XTB_FS05 0x064
- Frame Sync 05 Config Register.
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#define XTB_FS06 0x068
- Frame Sync 06 Config Register.
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#define XTB_FS07 0x06C
- Frame Sync 07 Config Register.
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#define XTB_FS08 0x070
- Frame Sync 08 Config Register.
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#define XTB_FS09 0x074
- Frame Sync 09 Config Register.
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#define XTB_FS10 0x078
- Frame Sync 10 Config Register.
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#define XTB_FS11 0x07C
- Frame Sync 11 Config Register.
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#define XTB_FS12 0x080
- Frame Sync 12 Config Register.
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#define XTB_FS13 0x084
- Frame Sync 13 Config Register.
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#define XTB_FS14 0x088
- Frame Sync 14 Config Register.
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#define XTB_FS15 0x08C
- Frame Sync 15 Config Register.
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#define XTB_GGD 0x090
- Generator Global Delay register.
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#define XTB_VER 0x0F0
- Version Register.
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#define XTB_RESET 0x100
- Reset Register.
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#define XTB_GIER 0x21C
- Global Interrupt Enable Register.
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#define XTB_ISR 0x220
- Interrupt Status Register.
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#define XTB_IER 0x228
- Interrupt Enable Register.
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#define XTimeBase_In32 XIo_In32
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#define XTimeBase_Out32 XIo_Out32
- #define XTimeBase_ReadReg(BaseAddress, RegOffset) XTimeBase_In32((BaseAddress) + (RegOffset))
- Read the given register.
- #define XTimeBase_WriteReg(BaseAddress, RegOffset, Data) XTimeBase_Out32((BaseAddress) + (RegOffset), (Data))
- Write the given register.
Detailed Description
This header file contains identifiers and register-level driver functions (or macros) that can be used to access the Xilinx MVI Video TimeBase device.
For more information about the operation of this device, see the hardware specification and documentation in the higher level driver xtimebase.h source code file.
MODIFICATION HISTORY:
Ver Who Date Changes
----- ---- -------- -----------------------------------------------
1.00a xd 08/05/08 First release
1.01a xd 07/23/10 Added GIER; Added more h/w generic info into
xparameters.h; Feed callbacks with pending
interrupt info. Added Doxygen & Version support
Definition in file xtimebase_hw.h.
Define Documentation
#define XTB_IXR_ALLINTR_MASK |
#define XTimeBase_ReadReg |
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BaseAddress, |
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RegOffset |
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XTimeBase_In32((BaseAddress) + (RegOffset)) |
#define XTimeBase_WriteReg |
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BaseAddress, |
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RegOffset, |
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Data |
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XTimeBase_Out32((BaseAddress) + (RegOffset), (Data)) |