Board and Kit Documentation

This getting started guide is designed to help you quickly and efficiently develop embedded systems using a fully integrated development platform.

This user guide provides a detailed description of each component and peripheral available on the ML501 Evaluation Platform. The ML501 board is a low-cost, entry-level platform for evaluation of Virtex®-5 LX FPGAs.

The Spartan®-6 FPGA SP601 Evaluation Kit enables hardware and software developers to create or evaluate designs targeting the XC6SLX16-CS324 Spartan-6 FPGA.

This user guide showcases various features of the Virtex®-5 FXT FPGA ML507 development board. It describes the hardware platform, the HelloWorld software application, and the BlueCat Linux images.

This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTP or GTX transceiver.

This is the PDF for the SP601 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

This user guide introduces several designs that demonstrate Spartan®-6 FPGA features using the SP601 evaluation board. The provided designs include processing systems based on the MultiBoot and the Xilinx® Memory Interface Generator for the Spartan-6 FPGA.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This user guide describes the Virtex®-5 FPGA ML561 Memory Interfaces Development Board, which is the heart of the Virtex-5 FPGA ML561 Memory Interfaces Tool Kit. The tool kit provides a complete development platform to interface with external memory devices for designing and verifying applications based on the Virtex-5 LXT Platform.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

This application note describes how the standard network performance suite Netperf is used to measure XPS LL TEMAC performance with MontaVista Linux 4.0.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This guide provides information about how to use the Video Starter Kit (VSK) to begin experimenting with video processing using the Spartan®-3A DSP family of FPGAs.

This guide documents the PHY daughter card for use with Xilinx ML32x Development Platforms.

This quick start guide provides a brief overview of the Spartan®-3A DSP FPGA Video Starter Kit (VSK) and how to run a set of pre-defined demonstration designs.

This user guide provides information and guidelines for using the Spartan®-3A DSP FPGA Video Starter Kit (VSK), a development platform consisting of the Spartan-3A DSP 3400A Development Platform, the FMC-Video daughter card, and a VGA camera.

This guide provides instructions for designing and accelerating the development of new products, and provides an excellent medium for consumer-oriented wireless and multimedia video applications.

This user guide describes how to use the FMC-Video daughter card, which is a part of the Spartan®-3A DSP Video Starter Kit (VSK) for firmware development. The user guide includes descriptions of the hardware, software tools, files, and test designs that are used.

The ML50x boards enable designers to investigate and experiment with features of Virtex®-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.

The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505, ML506, and ML507 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML50x boards.

This document describes the FPGA Mezzanine Card (FMC) debug mezzanine card (HWFMC-DBG-G) for use with supported Xilinx boards.

This manual accompanies the Spartan®-6 FPGA SP601 Evaluation Board and contains information about the SP601 hardware and software tools.

This manual accompanies the Virtex®-6 FPGA ML605 Evaluation Board and contains information about the ML605 hardware and software tools.

The SDI demonstration shows the capabilities of the SDI input and output interfaces on the Video Input and Output Daughter Card (VIODC). The demo can transmit and receive various digital video formats, both high-definition (HD) and standard-definition (SD) using the SDI receiver and transmitter on the VIODC. (The VSK is a demonstration platform only.)

This guide describes VIODC Verilog loop-through demo designs, how to make them, and how to run them. These designs serve as starting points for creating stand-alone VIODC applications using Verilog. The guide also describes how PicoBlaze™ is used to initialize the I2C interface on each device.

This user guide describes the components and operation of the Spartan®-3E FPGA Starter Kit Board. The Starter Kit provides a low-cost, easy-to-use development and evaluation platform for Spartan-3E FPGA designs.

This user guide describes the features and operation of the Virtex®-5 LXT, SXT, and FXT prototype platforms and describes how to configure chains of FPGAs and serial PROMs.

This tutorial provides step-by-step instructions for setting up and using the Virtex™-5 ML501 evaluation platform. The ML501 platform comes with a number of pre-installed demonstration and set-up programs. These programs are available on the System ACE interface, Platform Flash, and SPI Flash. This document guides designers through set-up and demonstration procedures.

This user guide introduces several designs that demonstrate Virtex™-5 LX device features using the ML501 Evaluation Platform.

This user guide describes the features and operation of the Virtex®-5 LXT and FXT FPGAs series of RocketIO™ characterization platforms, which includes the ML521, ML523, and ML525 boards.

This user guide describes the features and operation of the Virtex®-5 LX FPGA prototype platform and provides instructions to configure chains of FPGAs and serial PROMs.

This user guide provides detailed information regarding the kit specifications, software environment using System Generator, supported features, and System Generator-based design examples.

The MicroBlaze™ development kit allows designers to investigate and experiment with features of the Spartan™-3 family of FPGAs. This document describes features and operation of the SP305 Development Platform.

This user guide describes features and operations of the ML405 Evaluation Platform. This board allows users to investigate and experiment with features of the Virtex™-4 FX (XC4VFX20-FF672) FPGA.

This user guide describes the Virtex®-5 FPGA ML550 Networking Interfaces board, which is the heart of the Virtex-5 FPGA ML550 Source-Synchronous Interfaces Tool Kit.

This user guide describes the Virtex™-5 FPGA ML555 Development Kit for PCI and PCI Express designs.

This guide provides user information on determining the optimal DCM phase shift for the DDR feedback clock.

This document provides the specifications for designing customized personality modules for Xilinx Embedded Development Platforms that are equipped with personality module interface connectors.

This user guide describes the components and operation of the Spartan®-3 FPGA Starter Kit Board. The Starter Kit provides a low-cost, easy-to-use development and evaluation platform for Spartan-3 FPGA designs.

This guide documents the SDRAM daughter card for use with Xilinx ML32x Development Platforms.

Getting Started with the ML300 provides an overview of the contents of the ML300 Evaluation Platform, directions on how to start using your ML300, and references to more information.

The Xilinx 19-inch 1U Rack-Mount Chassis along with a Xilinx ML310 or ML410 embedded development platform is intended to be installed into a 4-post network rack for remote use, regression testing or computing and networking clusters. Custom Personality Modules (providing access to the Xilinx RocketIO™ MGTs, SelectIO™ signals, and other resources) a CD-ROM, or a hard disk can be added to the ML310/ML410 board within the Rack-Mount Chassis.

Getting Started with the Virtex®-4 ML403 Board and ISE® and EDK software setup and registration instructions.

The XGI SuperClock Module User Guide provides an overview of functionality, operation, and configuration of the SuperClock module add-on board.

Describes the components and operation of the ML450 Bit Error Rate Tester (BERT) and its graphical user interface (GUI).

This document describes the features and operation of the ML42x series of RocketIO™ characterization platforms based on Virtex®-4 FX FPGAs.

This manual accompanies the ML410 series of Embedded Development Platforms and contains information about the ML410 hardware and software tools. The ML410 offers designers a versatile Virtex®-4 FX platform for rapid prototyping and system verification.

User Guide for the Virtex™-4 ML455 PCI/PCI-X Development Kit.

This tutorial helps you get started using the ML401/ML402/ML403/ML405 evaluation platforms. These boards come with a number of pre-installed demonstration programs. This document guides you through these demonstrations and explains how to run them.

This user guide documents the ML40x reference designs, covering MicroBlaze™ processor based systems for ML401, ML402, and ML403 boards, and PowerPC™ 405 processor based systems for the ML403 and ML405 boards.

This user guide describes features and operation of the ML401 (LX), ML402 (SX), and ML403 (FX) Evaluation Platforms. These boards allow designers to investigate and experiment with the features of the Virtex™-4 family of FPGAs.

The Virtex™-4 ML461 Memory Interfaces Tool Kit provides a complete development platform to interface with external memory devices for designing and verifying applications based on the Virtex™-4 LX FPGA family.

This user guide describes the features and operation of the Virtex™-4 Socketed Development Platforms. These socketed boards can host Virtex-4 LX/SX devices in different packages and speed grades. Extension of all available I/Os to the boards’ “Pin Breakout Area” provide easy probing and analysis of the FPGA under test.

User Guide for the Virtex™-4 ML450 Development Board.

The ML310 Embedded Development Platform offers designers a versatile Virtex™-II Pro XC2VP30-FF896 based platform for rapid prototyping and system verification. This manual accompanies the ML310 Embedded Development System and contains information about the ML310 Hardware Platform and software tools.

This document describes the functional blocks within the ML365. It also provides various recommendations and requirements for usage of the board, including electrical requirements, logic analyzer requirements, and signal integrity issues. Simulation results using IBIS also are included.

This document describes the features and operation of the Virtex™-II Pro ML324 and ML325 prototype and demonstration boards.

This document describes the features and operation of the Virtex™-II Pro X MK322 and MK325 prototype and demonstration boards.

This document describes the design of the ML361 Virtex-II Pro™ DDR400/PC3200 Memory Board, which connects a Virtex-II Pro FPGA to DDR memories.

This manual accompanies the ML300 Development System and contains information about the ML300 Hardware Platform and software tools. The ML300 Kit includes the ML300 Hardware Platform, a system comprised of two boards. The two boards—the ML300 CPU board and the ML300 Power I/O board—provide for a comprehensive collection of peripherals to use in creating a system around the Virtex™-II Pro FPGA.

XLVDSPro Demonstration Boards User Guide for the Virtex-II Pro Family

This document describes the features and operation of the Virtex™-II Pro ML320, ML321, and ML323 prototype and demonstration boards. The ML32x boards allow designers to investigate and experiment with the features of RocketIO™ transceivers.

This document discusses the Virtex™-II Pro prototype platform and RISCWatch and RISCTrace interfaces.

The MicroBlaze and Multimedia Development Board is designed to be used as a compact platform for developing multimedia applications. This document describes the features and operation of Virtex™-II MicroBlaze and Multimedia Development Board.

Virtex-II LVDS Demonstration Board User Guide

This document describes the features and operation of the Virtex™-II Prototype Platforms, including how to configure chains of FPGAs and serial PROMs.

PDF of the Spartan™-3 Starter Board Kit for PCIe Schematics. Other related board files are included below.

Spartan™-3A/3AN FPGA Starter Kit board schematics.

The Xilinx Prototype board allows experimentation with Virtex™ devices prior to committing to using them for specific applications. It allows designers to try Virtex features such as block RAM, DLLs, and the SelectI/O resource, with an off-the-shelf resource. The Xilinx Prototype board also facilitates learning the entire design flow from schematic capture or HDL to programming and verification of designs.

This is the PDF file of the SP305 Schematic. A .zip file containing a ViewLogic Schematic, a PDF file of the SP305 Gerber, and a .zip file containing ViewLogic Gerber files can be found below.

This is the PDF file of the ML501 schematics. The schematic source files (Viewdraw), Gerber plots, and other board-related files are accessible from the link below.

This is the PDF for the ML410 schematics. The schematic source files (Viewdraw) and other related ML410 board files are accessible from the link below.

This is the PDF for the ML401, ML402, and ML403 schematics. The schematic source files (Viewdraw), Gerber plots, and other board-related files are accessible from the link below.

This is the PDF for the ML321 schematics. The Gerber plots, fab drawings, Gerber files, PCB files, and schematic files (Viewdraw) can be found below.

This is the PDF for the ML300 Power I/O board schematics. The schematic source files (Viewdraw) and other related ML300 Power I/O files are accessible from the link below.

Spartan-3E Starter Kit schematics, rev D

This is the PDF for the ML555 schematics. The schematic source files (Viewdraw) and other related ML555 board files are listed below.

This is the PDF file of the ML523 Schematic. The ML523 fab drawings, Gerber files, PCB files, and schematic files (Viewdraw) can be found below.

This is the ML521 BRD file for the PCB layout.

16 channel, LVDS, 4:1 Deserialization, SDR. This design demonstrates the operation of an SFI-4 physical interface in Virtex®-4 at the key SFI-4 rates of 622, 644, and 700 Mbits/s. The source synchronous alignment scheme used is bus alignment, meaning that all 16 data channels are treated as one channel and aligned at the same time. This assumes minimal skew between channels. There is no training pattern for this design.

The purpose is to describe the functionality and contents of the Spartan®-3A DSP Starter Platform from Xilinx. This document includes instructions for operating the board and descriptions of the hardware features.

Gerber board layout plots in PDF format for the Spartan™-3A and Spartan™-3AN FPGA Starter Kit boards.

This is the PDF for the ML450 schematics. The schematic source files (Viewdraw) and other related ML450 board files are listed below.

This is the PDF for the ML405 schematics. The Gerber plots, fab drawings, Gerber files, PCB files, and schematic files (Viewdraw) can be found below.

This is the PDF for the ML323 schematics. The Gerber plots, fab drawings, Gerber files, PCB files, and schematic files (Viewdraw) can be found below.

This is the PDF for the ML310 schematics. The schematic source files (Viewdraw) and other related ML310 board files are accessible from the link below.

This is the PDF for the ML300 CPU board schematics. The schematic source files (Viewdraw) and other related ML300 CPU files are accessible from the link below.

This is the PDF for the AFX-FF676 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the AFX-FF665 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the AFX-FF324 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the AFX-FF1760 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the AFX-FF1738 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the AFX-FF1153 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This user guide describes the components and operation of the Spartan™-3A/3AN FPGA Starter Kit Board, for Revision D. The Starter Kit provides a low-cost, easy-to-use development and evaluation platform for Spartan-3A/3AN FPGA designs.

Describes the original Revision C Spartan™-3A FPGA Starter Kit Board. See UG334 for the Revision D board.

User guide for getting started with the MicroBlaze™ Development Kit using the Spartan™-3E 1600E.

This user guide provides everything you need to build a low-cost Spartan™-3-based PCI Express application.

This Quick Start Guide provides a brief overview of the content of the kit and describes the installation of the Xilinx software components that are provided with the Video Starter Kit. This document details how to connect your Video Starter Kit to run a first set of diagnostics.

This user guide provides detailed information specific to the Video Input and Output Daughter Card, its video hardware interfaces, and the image sensor camera.

This document details the implementation and use of the MPEG-4 Part 2 Decoder Demonstration system that is included with the Video Starter Kit. The design can be used as a demonstration of an FPGA performing video decompression or as a development platform for those interested in building their own systems.

This is the PDF for the AFX-FF1136 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

This is the PDF for the SL361 schematics. The Gerber files and other related SL361 board files are in the attached ZIP file.

This is the PDF for the ML52x power module schematics.

This is the PDF file of the ML550 Schematic.

This is the PDF file for the ML521 schematics.

This is the ZIP of the ML521 Gerber files.

16 Channel, LVDS, 4:1 Deserialization, DDR. This design demonstrates the operation of an implementation similar to SPI-4.2 in Virtex®-4. The source synchronous alignment scheme used is bit alignment, meaning that all 16 data channels are treated independently in the alignment process. The alignment in this demo is driven by the XAPP700 reference design. The training pattern is 1111_1111_1100_0000_0000.

This is the PDF file of the ML423 schematic. The fab drawings, Gerber files, and PCB files can be found below.

The reference designs enable customers to jumpstart their PCI Express® application development. All reference designs are provided as-is.

This user guide provides basic information on the MicroBlaze™ Development Kit board capabilities, functions, and design, and general information on how to use the various peripheral functions included on the board.

Reference Manual for CoolRunner™-II Evaluation Board

This is the Spartan®-3A DSP S3D1800A Getting Started Guide.

This document describes the hardware platform, the HelloWorld software application, the MicroBlaze Processor BlueCat Linux image, and the PowerPC Processor MontaVista Linux image.

This design shows how a two-dimension, 5x5 linear FIR Filter (2D FIR) can be realized efficiently using n-tap MAC FIR Filters.

This is the PDF file of the ML525 Schematic. The ML525 fab drawings, Gerber files, PCB files, and schematic files can be found below.

Tutorial for CoolRunner™-II Evaluation Board.

This is a getting started guide for the Xilinx® MicroBlaze™ and PowerPC® Development Kit.