Resource Utilization for AXI Quad SPI v3.2

Vivado Design Suite Release 2017.3

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex-7

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C_SPI_MEMORY
C_USE_STARTUP
C_SPI_MODE
C_NUM_TRANSFER_BITS
C_NUM_SS_BITS
C_SCK_RATIO
C_FIFO_DEPTH
C_XIP_MODE
C_FAMILY
C_TYPE_OF_AXI4_INTERFACE
Async_Clk
Fixed clocks (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7k325t ffg900 -2 kintex_artix_scenario34517_0 1 0 2 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 411 577 243 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 -2 kintex_artix_scenario34517_1 1 1 2 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 414 580 246 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 -2 kintex_artix_scenario34517_M0 1 0 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 371 566 236 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 -2 kintex_artix_scenario34517_M1 0 1 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 384 567 235 0 0 0 PRODUCTION 1.12 2017-02-17

Zynq-7000

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
C_SPI_MEMORY
C_USE_STARTUP
C_SPI_MODE
C_NUM_TRANSFER_BITS
C_NUM_SS_BITS
C_SCK_RATIO
C_FIFO_DEPTH
C_XIP_MODE
C_FAMILY
C_TYPE_OF_AXI4_INTERFACE
Async_Clk
Fixed clocks (MHz) LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7z020 clg484 -1 zynq_artix_scenario34517_0 1 0 2 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 411 577 229 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z020 clg484 -1 zynq_artix_scenario34517_1 1 1 2 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 412 580 240 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z020 clg484 -1 zynq_artix_scenario34517_M0 1 1 0 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 372 566 234 0 0 0 PRODUCTION 1.11 2014-09-11
xc7z020 clg484 -1 zynq_artix_scenario34517_M1 0 1 8 1 2 16 0 kintex7 1 1 ext_spi_clk=50 s_axi4_aclk=100 384 567 237 0 0 0 PRODUCTION 1.11 2014-09-11

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