Resource Utilization for JTAG to AXI Master v1.2

Vivado Design Suite Release 2017.3

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Virtex-7

Part Information Configuration Parameters Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
M_AXI_DATA_WIDTH
M_AXI_ADDR_WIDTH
M_AXI_ID_WIDTH
LUTs FFs LUT-FF Pairs DSP48s 36k BRAMs 18k BRAMs Speedfile Status
xc7vh580t hcg1931 -2 jtag_axi_v1_2_full32 0 64 32 4 918 1808 424 0 3 0 PRODUCTION 1.08 2014-09-11
xc7vh580t hcg1155 -1 jtag_axi_v1_2_full64 0 64 64 4 917 1936 410 0 3 2 PRODUCTION 1.08 2014-09-11
xc7vh580t hcg1931 -2 jtag_axi_v1_2_fulld32 0 32 4 698 1544 378 0 2 1 PRODUCTION 1.08 2014-09-11
xc7vh580t hcg1931 -2 jtag_axi_v1_2_lite32 2 32 648 1470 337 0 2 1 PRODUCTION 1.08 2014-09-11
xc7vh580t hcg1931 -2 jtag_axi_v1_2_lite64 2 64 651 1598 339 0 2 3 PRODUCTION 1.08 2014-09-11

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