Registers, Shifters, and Pipelining
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RAM-based Shift Register
| Date | Name |
|---|---|
| 03/01/2011 | LogiCORE IP RAM-based Shift Register v11.0 Data Sheet(PDF, ver 11.1, 218 KB )
The Xilinx® LogiCORE™ IP RAM-based Shift Register core provides a very efficient multi-bit wide shift register for use in FIFO-like applications or as a delay line. Fixed-length shift registers and variable-length shift registers can be created. |
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