64-bit Initiator/Target for PCI

The 64-Bit Initiator/Target core v3 165 & v4.7 for PCI™ is a pre-implemented and fully tested module for Xilinx® FPGAs. The pinout for each device and the relative placement of the internal logic are predefined.

The LogiCORE™ IP Initiator/Target v3.1 for PCI Getting Started Guide contains information about the supported design flows for 32-bit and 64-bit cores based on the Virtex™ and Spartan™ architectures, as well as an example design.

The LogiCORE™ IP Initiator/Target for PCI Getting Started Guide provides information about the Xilinx core interface for Peripheral Component Interconnect (PCI), which provides a fully verified, pre-implemented PCI bus interface targeting devices based on the Virtex®-5 FPGA architecture.

The LogiCORE™ IP Initiator/Target v3.1 for PCI™ user guide provides a comprehensive reference for use during the design phase of a project.

The LogiCORE™ IP Initiator/Target for PCI™ User Guide provides information about the interface for Peripheral Component interconnect (PCI) core, which provides a fully verified, pre-implemented PCI bus interface available in both 32-bit and 64-bit versions based on the Virtex® FPGA architecture. The guide serves as a comprehensive reference for use during the design phase of a project.