Serial RapidIO
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Serial RapidIO
| Date | Name |
|---|---|
| 04/19/2010 | LogiCORE IP Serial RapidIO v5.5 Getting Started Guide(PDF, ver 9.0, 2.88 MB )
This guide contains information for generating the Xilinx LogiCORE™ IP Serial RapidIO Endpoint solution, which includes the Serial RapidIO Physical Layer, Buffer, and RapidIO Logical Layer cores. It also provides detailed information for customizing and simulating these RapidIO cores and for running the design files through implementation using Xilinx® tools. |
| 07/29/2011 | LogiCORE IP Serial RapidIO v5.6 User Guide(PDF, ver 5.1, 10.99 MB )
The Serial RapidIO User Guide provides information about the Xilinx LogiCORE™ IP Serial RapidIO Solution. The Xilinx SRIO Solution consists of three Xilinx cores enhanced with reference designs and wrapper modules to create a functional endpoint. |
| 03/01/2011 | LogiCORE IP Serial RapidIO v5.6 Data Sheet(PDF, ver 4.0, 312 KB )
The LogiCORE™ IP Serial RapidIO Endpoint (EP) solution comprises a highly flexible and optimized Serial RapidIO Physical Layer core and a Logical (I/O) and Transport Layer interface. |
| 10/19/2011 | LogiCORE IP Serial RapidIO Gen2 v1.2 Product Guide (AXI)(PDF, ver 1.0, 3.44 MB )
The LogiCORE™ IP Serial RapidIO Gen2 Endpoint solution comprises a highly flexible and optimized Serial RapidIO Physical Layer core and a Logical (I/O) and Transport Layer core. This IP solution is provided in netlist form with supporting example design code. This document contains information about the AXI4 version of the core. |
| 01/18/2012 | LogiCORE IP Serial RapidIO Gen2 v1.3 Product Guide (AXI)(PDF, ver 2.0, 3.58 MB )
The LogiCORE™ IP Serial RapidIO Gen2 Endpoint solution comprises a highly flexible and optimized Serial RapidIO Physical Layer core and a Logical (I/O) and Transport Layer core. This IP solution is provided in netlist form with supporting example design code. This document contains information about the AXI4 version of the core. |
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