Ten Gigabit Ethernet PCS/PMA
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Ten Gigabit Ethernet PCS/PMA
| Date | Name |
|---|---|
| 03/01/2011 | LogiCORE IP 10-Gigabit Ethernet PCS/PMA v2.1 Data Sheet(PDF, ver 2.1, 372 KB )
The LogiCORE™ IP 10-Gigabit Ethernet PCS/PMA (10GBASE-R) core forms a seamless interface between the Xilinx® 10-Gigabit Ethernet Media Access Controller (MAC) and a 10 Gbps-capable PHY, enabling the design of high-speed Ethernet systems and subsystems. The core supports 10GBASE-R on Virtex®-7, Kintex™-7 and Virtex-6 HXT |
| 03/01/2011 | LogiCORE IP Ten Gigabit Ethernet PCS/PMA v2.1 User Guide(PDF, ver 2.1, 3.15 MB )
This guide provides information about generating a LogiCORE™ IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) core, customizing and simulating the core utilizing the provided example design, and running the design files through implementation using the Xilinx® tools. |
| 10/19/2011 | LogiCORE IP 10-Gigabit Ethernet PCS/PMA v2.2 Data Sheet(PDF, ver 2.2, 428 KB )
The LogiCORE™ IP 10-Gigabit Ethernet PCS/PMA core forms a seamless interface between the Xilinx@reg; 10-Gigabit Ethernet Media Access Controller (MAC) and a 10 Gb/s-capable PHY, enabling the design of high-speed Ethernet systems and subsystems. The core supports 10GBASE-R on Virtex®-7, Kintex™-7, and Virtex-6 HXT FPGAs. |
| 10/19/2011 | LogiCORE IP Ten Gigabit Ethernet PCS/PMA v2.2 User Guide(PDF, ver 2.2, 2.69 MB )
This guide provides information about generating a LogiCORE™ IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) core, customizing and simulating the core utilizing the provided example design, and running the design files through implementation using the Xilinx® tools. |
| 04/24/2012 | LogiCORE IP 10-Gigabit Ethernet PCS/PMA v2.3 Data Sheet(PDF, ver 2.3, 401 KB )
The LogiCORE™ IP 10-Gigabit Ethernet Physical Coding Sublayer/Physical Medium Attachment (PCS/PMA) core forms a seamless interface between the Xilinx® 10-Gigabit Ethernet Media Access Controller (MAC) and a 10 Gb/s-capable PHY, enabling the design of high-speed Ethernet systems and subsystems. |
| 04/24/2012 | LogiCORE IP Ten Gigabit Ethernet PCS/PMA v2.3 User Guide(PDF, ver 2.3, 3.58 MB )
This guide provides information about generating a LogiCORE™ IP Ten Gigabit Ethernet PCS/PMA (10GBASE-R) core, customizing and simulating the core utilizing the provided example design, and running the design files through implementation using the Xilinx® tools. |
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