Aurora 64B/66B

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Aurora 64B/66B

Name	Doc Version	Size	Date

Aurora 64B/66B v3.1 User Guide (PDF) View Document Details This user guide describes the function and operation of the LogiCORE™ IP Aurora 64B/66B v3.1 Core and provides information about designing, customizing, and implementing the core. Was this document helpful? Yes \| No	3.1	1.95 MB	09/16/2009
Aurora 64B/66B v3.1 Data Sheet (PDF) View Document Details The LogiCORE™ IP Aurora 64B/66B core implements the Aurora 64B/66B protocol using the high-speed serial RocketIO™ GTX transceivers in Virtex®-5 FXT and TXT platforms. Was this document helpful? Yes \| No	3.1	307 KB	09/16/2009
Aurora 64B/66B v3.1 Getting Started Guide (PDF) View Document Details This guide provides information about generating a LogiCORE™ IP Aurora 64B/66B core using high-speed serial GTX transceivers in Virtex®-5 FPGA FXT/TXT and Virtex-6 FPGA LXT/SXT families. Was this document helpful? Yes \| No	1.1	1015 KB	09/16/2009
Virtex-5 FPGA Aurora 8B/10B Migration to Aurora 64B/66B User Guide (PDF) View Document Details Xilinx offers two versions of LogiCORE™ IP Aurora cores that are distinguished by the encoding performed on the serial link: the Aurora 8B/10B core and Aurora 64B/66B core. This guide discusses their differences and provides instructions to migrate an Aurora 8B/10B core design to an Aurora 64B/66B core design. Was this document helpful? Yes \| No	1.0	397 KB	06/24/2009

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