XAUI

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XAUI

Name	Doc Version	Size	Date

XAUI v7.3 Data Sheet (PDF) View Document Details The LogiCORE™ IP XAUI core is a high-performance, low pin count 10-Gbps interface intended to allow physical separation between data-link layer and physical layer devices in a 10-Gigabit Ethernet system. Was this document helpful? Yes \| No	1.7	305 KB	03/24/2008
XAUI v7.3 Getting Started Guide (PDF) View Document Details The LogiCORE™ IP XAUI Getting Started Guide provides instructions for generating the core, customizing and simulating the core using the provided example design, and runing the design files through implementation using the Xilinx tools. Was this document helpful? Yes \| No	1.7	293 KB	03/24/2008

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