Data Side On Chip Memory
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Data Side On Chip Memory
| Date | Name |
|---|---|
| 01/23/2007 | Data Side OCM Bus v1.0 (v2.00a) Data Sheet(PDF, ver 1.0, 141 KB )
The DSOCM Bus core is a data-side On-Chip Memory (OCM) bus interconnect core. The core connects the PowerPC™ 405 data-side OCM interface to OCM peripherals, such as the data-side OCM BRAM controller (DSBRAM_IF_CNTRL). |
| 04/24/2009 | Data Side OCM Bus v1.0 (PDF, ver 1.5, 253 KB )
This is the data sheet for the Data Side OCM Bus v1.0 core |
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