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AXI Ethernet

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AXI Ethernet

DateName
03/01/2011 LogiCORE IP AXI Ethernet (v2.00a) Data Sheet (AXI)(PDF, ver 1.2, 4.65 MB )

This document provides the design specification for the AXI Ethernet core. This core can implement a tri-mode (10/100/1000 Mbps) Ethernet MAC or a 10/100 Mbps Ethernet MAC. It supports most popular PHY interfaces including 1000BASE-X and SGMII. This document contains information about the AXI4 version of the core.

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03/01/2011 LogiCORE IP AXI Ethernet (v2.01a) Data Sheet (AXI)(PDF, ver 1.2.1, 5.97 MB )

This document provides the design specification for the AXI Ethernet core. This core can implement a tri-mode (10/100/1000 Mbps) Ethernet MAC or a 10/100 Mbps Ethernet MAC. It supports most popular PHY interfaces, including 1000BASE-X and SGMII. The core optionally supports Ethernet AVB (Audio Video Bridging) funct ions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset. This AXI4-Lite slave interface supports single beat read and write data transfers (no burst transfers).

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12/14/2010 LogiCORE IP AXI Ethernet (v1.01a) Data Sheet (AXI)(PDF, ver 1.1, 4.83 MB )

This document provides the design specification for the AXI Ethernet core. This core can implement a tri-mode (10/100/1000 Mbps) Ethernet MAC or a 10/100 Mbps Ethernet MAC. It supports most popular PHY interfaces including 1000BASE-X and SGMII. This document contains information about the AXI4 version of the core.

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11/17/2011 LogiCORE IP AXI Ethernet (v3.00a) Data Sheet (AXI)(PDF, ver 1.4, 5.89 MB )

This document provides the design specification for the LogiCORE™ IP AXI Ethernet core. This core implements a tri-mode (10/100/1000 Mb/s) Ethernet MAC or a 10/100 Mb/s Ethernet MAC. It supports the most popular PHY interfaces, including 1000BASE-X and SGMII. The core optionally supports Ethernet AVB (Audio Video Bridging) functions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.optionally supports Ethernet AVB (Audio Video Bridging) functions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.

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04/24/2012 LogiCORE IP AXI Ethernet (v3.01a) Data Sheet (AXI)(PDF, ver 2.0, 4.27 MB )

This document provides the design specification for the LogiCORE™ IP AXI Ethernet core. This core implements a tri-mode (10/100/1000 Mb/s) Ethernet MAC or a 10/100 Mb/s Ethernet MAC. It supports the most popular PHY interfaces, including 1000BASE-X and SGMII. The core optionally supports Ethernet AVB (Audio Video Bridging) functions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.optionally supports Ethernet AVB (Audio Video Bridging) functions. This core provides a control interface to internal registers via a 32-bit AXI4-Lite Interface subset.

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