Floating-Point Unit for the PowerPC (Single Precision)
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Floating-Point Unit for the PowerPC (Single Precision)
| Date | Name |
|---|---|
| 03/11/2008 | APU Floating-Point Unit v3.1 Data Sheet(PDF, ver 3.1, 398 KB )
This data sheet is for the APU Floating-Point Unit v3.1 core. |
| 03/01/2011 | LogiCORE IP Virtex-5 APU Floating-Point Unit v1.01a(PDF, ver 1.3, 431 KB )
The Xilinx LogiCORE™ IP Auxiliary Processor Unit (APU) Floating-Point Unit is an optimized floating-point unit designed for the PowerPC™ 440 embedded microprocessor of the Virtex®-5 FXT FPGA family. The FPU implementation provides support for IEEE-754 floating-point arithmetic operations in single or double precision. |
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