ML507
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ML507
| Date | Name |
|---|---|
| 12/15/2008 | XAPP1127 - XPS LL Tri-Mode Ethernet MAC Performance with Monta Vista Linux(PDF, ver 1.0, 410 KB )
This application note describes how the standard network performance suite Netperf is used to measure XPS LL TEMAC performance with MontaVista Linux 4.0. Design File(s): |
| 09/26/2008 | XAPP1060 - Reference System: Debugging PowerPC 440 Processor Systems(PDF, ver 1.1, 1.72 MB )
This application note outlines the techniques for debugging PowerPC® 440 processor systems in hardware and simulation. Design File(s): |
| 06/23/2009 | ML505/ML506/ML507 Reference Design User Guide(PDF, ver 3.1, 616 KB )
This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTP or GTX transceiver. Design File(s): |
| 03/01/1999 | XAPP137 - Configuring Virtex FPGAs from Parallel EPROMs with a CPLD(PDF, ver 1.0, 81 KB )
Previous generations of Xilinx® FPGAs supported a Master Parallel Configuration Mode which allowed the FPGA to configure itself directly from a parallel (byte wide) PROM. The Virtex® family of Xilinx FPGAs does not utilize a Master Parallel mode. This application note describes a simple interface design to configure a Virtex device from a parallel EPROM using the SelectMAP configuration mode. Design File(s): |
| 07/30/2009 | Xilinx MicroBlaze and PowerPC Processor Embedded Kit - Virtex-5 FX70T FPGA Edition Getting Started Guide(PDF, ver 1.0.1, 881 KB )
This getting started guide is designed to help you quickly and efficiently develop embedded systems using a fully integrated development platform. |
| 06/18/2009 | ML505/ML506/ML507 Getting Started Tutorial(PDF, ver 3.0.3, 927 KB )
The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505, ML506, and ML507 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML50x boards. Design File(s): |
| 01/05/2009 | XAPP1040 - Reference System: PLBv46 Endpoint Bridge for PCI Express in a ML507 Embedded Development Platform(PDF, ver 1.0, 7.54 MB )
This reference system demonstrates the functionality of the PLBv46 Endpoint Bridge for PCI Express® used in the Xilinx ML507 Embedded Development Platform. Design File(s): |
| 07/30/2009 | Virtex-5 FXT FPGA PowerPC 440 and MicroBlaze Edition Kit Reference Systems(PDF, ver 1.2.1, 2.19 MB )
This user guide showcases various features of the Virtex®-5 FXT FPGA ML507 development board. It describes the hardware platform, the HelloWorld software application, and the BlueCat Linux images. Design File(s): |
| 05/16/2011 | ML505/ML506/ML507 Evaluation Platform User Guide(PDF, ver 3.1.2, 2.58 MB )
The ML50x boards enable designers to investigate and experiment with features of Virtex®-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. Design File(s): |
| 05/15/2008 | ML505/ML506/ML507 Schematics(PDF, ver 1.0.2, 885 KB )
This is the PDF for ML505, ML506, and ML507 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below. Design File(s): |
| 08/07/2008 | Getting Started with the Xilinx MicroBlaze and PowerPC Development Kit - Virtex-5 FXT70 Edition(PDF, ver 1.0, 95 KB )
This is a getting started guide for the Xilinx® MicroBlaze™ and PowerPC® Development Kit. |
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