ISE
Timing Constraints Strategies
The ISE® software allows you to enter timing constraints that describe the timing performance requirements of the design. Providing a concise set of constraints achieves the following:
  •  Allows the software to create a design that meets your requirements.
  •  Allows you to compare the constraints to the performance of the resulting design, using the timing reports output by the ISE software. By analyzing the timing reports, you can identify the paths in the design that may require coding modifications, placement directives, or additional constraints to achieve timing closure.
  •  Increases the performance of the ISE software by reducing the memory and runtime requirements.
Global versus Specific Timing Constraints
To constrain a design, you must first identify the types of timing paths in the design. By identifying the paths, you can then choose the appropriate constraints for each path. Global paths typically identify all the registered elements contained in one clock domain. Global paths include the following: input paths, paths between registered elements, and output paths in a specific clock domain. Specific paths typically identify purely combinatorial or static paths, paths between clock domains, or multi-cycle paths. Cover the majority of the paths in the design with global constraints. Cover paths that require exceptions with specific path constraints.
After you identify the paths and partition them into global and specific paths, you must choose the appropriate constraint for each path. Do not overconstrain the paths. For information on the constraints available, see the Constraints Guide.
See Also

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