After you create the test bench
and design code, you can perform functional simulation on the design.
Functional simulation is an iterative process, which may require multiple
simulations to achieve the desired end functionality of the design.
After the desired functionality is achieved, use the output data
to create a self-checking test bench. This allows for automated testing
and reduces the change of a functional regression in the design due
to seemingly unrelated changes. It is important to set up the proper
infrastructure for this type of simulation; spending time up front
may save more time in back end design debugging.
Following are general recommendations:
- Spend time up front to create a good test bench.
Creating
a test bench that you can use for both functional and timing simulation
can save substantial time and effort. Even if you do not intend to
perform timing simulation, it may become necessary during debugging,
which makes a dual-purpose test bench highly beneficial.
For details, see
Test
Benches.
- Ensure that your libraries are properly compiled and mapped.
If your design includes UNISIM/UniMacro components or Xilinx® CORE Generator™ cores,
make sure that your libraries are properly compiled and mapped to
the simulator. If you are using the ISim or the ModelSim Xilinx Edition
simulator, this is automatically done for you. For details, see
Simulation Libraries.
- Automate the compilation and elaboration simulation steps.
When you invoke the simulator from within Project Navigator, the ISE® tools
automatically run these steps. If you are running the simulator outside
of Project Navigator, it is recommended that you create a script or use
another method to automate these steps. For more information,
refer to the documentation for your simulator.
- Customize the simulator interface to present the information
needed to debug the design.
You may want to include the information
console, the structure or hierarchy view, and the waveform viewer
as well as other facilities to evaluate the simulation. Customization
can improve the simulation experience and can be tied into the automation
of the compilation and elaboration steps. If you are using a waveform
viewer as a part of simulation debugging, organize the waveform view
to display the proper signals in the proper order with the proper
radices. This saves time and helps prevent confusion in interpreting
simulation results.
Note You can perform simulation in different ways, and what works
best in one case may not necessarily apply to another. These are general
recommendations that can improve simulation in most cases.