ISE
Using Language Templates
The ISE® Language Templates provide predefined pieces of code and code syntax for use in your source files. These templates enable easy insertion of pre-built text structures into your VHDL, Verilog, Tcl, or UCF source file. There are several types of pre-built templates available, such as common language structures or instantiation templates for synthesis.
To Use Language Templates
  1.  Select Edit > Language Templates, or click the Language Templates toolbar button Image.
  2.  In the Language Templates window that opens in the Project Navigator Workspace, click the plus (+) icon next to one of the following folders: Tcl, UCF, VHDL, Verilog.
  3.  Click the plus (+) icon to expand the folders until you find the template you want to use.
  4.  Select the template to display it in the right pane.
  5.  Insert the code in your source file, as described in Adding Code Using Language Templates.
See Also
Adding Code Using Language Templates
Creating Custom Language Templates
Language Templates Toolbar

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