- Configuration Rate
Specifies the clock configuration rate in MHz. Select
a value from the drop-down list.
By default, this property is
set as follows:
- Spartan®-3 devices: 6 MHz
- Spartan-3E devices: 1 MHz
- Spartan-3A and Spartan-3A Extended devices: 25 MHz
- Virtex®-4 devices: 4 MHz
- Virtex-5, Virtex-6, and Spartan-6 devices: 2 MHz
- Configuration Clk (Configuration Pins) (Virtex-4, Virtex-5, Virtex-6,
and Spartan-3 devices only)
Specifies whether the Configuration CLK (CCLK) pin of the FPGA
should be left floating, or should be internally pulled up with a
resistor. Select an option from the drop-down list.
- Pull Up
Enables the pull-up resistor on the CCLK pin. This option
can help prevent clock glitches.
- Float
Disables the pull-up resistor on the CCLK pin.
By default, this property is set to Pull Up.
- Configuration Pin M0 (Virtex-4, Virtex-5, Virtex-6, and Spartan-3 devices
only)
Specifies whether you want to add a pull-up or pull-down resistor
to the M0 pin, or leave the M0 pin floating. The value of the
pull-up and pull-down resistors is 50 to 100 kilohms. Select an option
from the drop-down list.
- Pull Up
Adds a pull-up resistor to the M0 pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor to the M0 pin.
By default, this property is set to Pull Up.
- Configuration Pin M1 (Virtex-4, Virtex-5, Virtex-6, and Spartan-3 devices
only)
Specifies whether you want to add a pull-up or pull-down resistor
to the M1 pin, or leave the M1 pin floating. Select an option from
the drop-down list.
- Pull Up
Adds a pull-up resistor to the M1 pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor on the M1 pin.
By default, this property is set to Pull Up.
- Configuration Pin M2 (Virtex-4, Virtex-5, Virtex-6, and Spartan-3 devices
only)
Specifies whether you want to add a pull-up or pull-down resistor
to the M2 pin, or leave the M2 pin floating. Select an option from
the drop-down list.
- Pull Up
Adds a pull-up resistor to the M2 pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor to the M2 pin.
By default, this property is set to Pull Up.
- Configuration Pin Program
Specifies whether you want to add a pull-up or pull-down resistor
to the PROGRAM pin, or leave it floating. Select an option from the
drop-down list.
By default, this property is set to Pull Up.
- Configuration Pin Done
Specifies whether you want to add a pull-up resistor to the
DONE pin, or leave it floating. The DONE pin configures an open-drain
driver that requires a pull-up resistor to indicate the end of the
configuration. The value of the pull-up resistor is 2 to 8 kilohms.
- Pull Up
Adds an internal pull-up resistor to the DONE pin. Select this
option only if you do not connect an external pull-up resistor to
this pin. Select an option from the drop-down list.
- Float
Disables the pull-up resistor connection to the DONE pin. If
you select this option, be sure you have connected an external pull-up
resistor to this pin.
By default, this property is set to Pull Up.
- Configuration Pin Init (Virtex-4, Virtex-5, and Virtex-6 devices
only)
Specifies whether you want to add a pull-up resistor to the
INIT pin, or leave the INIT pin floating. Select an option from the
drop-down list.
- Pull Up
Adds a pull-up resistor to the Init pin.
- Float
Disables the pull-up resistor connection to the Init pin.
By default, this property is set to Pull Up.
- Configuration Pin CS (Virtex-4, Virtex-5, and Virtex-6 devices only)
Specifies whether you want to add a pull-up or pull-down resistor
to the CS pin, or leave the CS pin floating. Select an option from
the drop-down list.
- Pull Up
Adds a pull-up resistor to the CS pin.
- Pull Down
Adds a pull-down resistor to the CS pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
By default, this property is set to Pull Up.
- Configuration Pin Din (Virtex-4, Virtex-5, and Virtex-6 devices only)
Specifies whether you want to add a pull-up or pull-down resistor
to the DIN pin, or leave the DIN pin floating. Select an option from
the drop-down list.
- Pull Up
Adds a pull-up resistor to the DIN pin.
- Pull Down
Adds a pull-down resistor to the DIN pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
By default, this property is set to Pull Up.
- Configuration Pin Busy (Virtex-4, Virtex-5, and Virtex-6 devices
only)
Specifies whether you want to add a pull-up or pull-down resistor
to the Busy pin, or leave the Busy pin floating. Select an option
from the drop-down list.
- Pull Up
Adds a pull-up resistor to the Busy pin.
- Pull Down
Adds a pull-down resistor to the Busy pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
By default, this property is set to Pull Up.
- Configuration Pin RdWr (Virtex-4, Virtex-5, and Virtex-6 devices
only)
Specifies whether you want to add a pull-up or pull-down resistor
to the RdWr pin, or leave the RdWr pin floating. Select an option
from the drop-down list.
- Pull Up
Adds a pull-up resistor to the RdWr pin.
- Pull Down
Adds a pull-down resistor to the RdWr pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
By default, this property is set to Pull Up.
- Configuration Pin Powerdown (Virtex-4 devices only)
Specifies the configuration of the Powerdown pin. Select an
option from the drop-down list.
- Pull Up
Adds an internal pull-up resistor to the Powerdown pin.
- Float
Disables the pull-up resistor connection to the Powerdown pin.
By default, this property is set to Pull Up.
- HSWAPEN Pin (Virtex-4, Virtex-5, Virtex-6, Spartan-3, and Spartan-6 devices
only)
Specifies the configuration of the HSWAPEN pin. Select an option
from the drop-down list.
- Pull Up
Adds an internal pull-up resistor to the HSWAPEN pin.
- Float
Disables the pull-up resistor connection to the HSWAPEN pin.
- Pull Down
Adds a pull-down resistor on the HSWAPEN pin.
By default, this property is set to Pull Up.
- JTAG Pin TCK
Specifies the configuration for the JTAG test clock (TCK) I/O
pin. Select an option from the drop-down list.
- Pull Up
Adds a pull-up resistor on the TCK pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor on the TCK pin.
By default, this property is set to Pull Up.
- JTAG Pin TDI
Specifies the configuration for the JTAG TDI pin which sets
the serial data input for all JTAG instructions and JTAG registers.
Select an option from the drop-down list.
- Pull Up
Adds a pull-up resistor on the TDI pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor on the TDI pin.
By default, this property is set to Pull Up.
- JTAG Pin TDO
Specifies the configuration for the JTAG TDO pin which sets
the serial data output for all JTAG instruction and data registers.
Select an option from the drop-down list.
- Pull Up
Adds a pull-up resistor to the TDO pin.
- Float
No connection is made to either a pull-up and pull-down resistor.
- Pull Down
Adds a pull-down resistor to the TDO pin.
By default, this property is set to Pull Up.
- JTAG Pin TMS
Specifies the configuration for the TMS pin which sets the
input signal mode to the TAP controller. The TAP controller provides
the control logic for JTAG. Select an option from the drop-down list.
- Pull Up
Adds a pull-up resistor to the TMS pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
- Pull Down
Adds a pull-down resistor on the TMS pin.
By default, this property is set to Pull Up.
- Unused IOB Pins
Specifies the configuration for any unused IOB pins. This is
the serial data outputs for all JTAG instruction and data registers.
Select an option from the drop-down list.
- Pull Down
Adds a pull-down resistor to the unused Pin.
- Pull Up
Adds a pull-up resistor to the unused Pin.
- Float
No connection is made to either a pull-up or pull-down resistor.
By default, this property is set to Pull Down.
- UserID Code (8 Digit Hexadecimal)
Specifies a code to assign to the User Identification Register.
Enter an eight digit hexadecimal ID code in the property. The hexadecimal
digits are placed in the User ID Register.
By default, this
property is set to 0xFFFFFFFF.
- Reset DCM if SHUTDOWN & AGHIGH performed (Spartan-3 and Spartan-3E devices
only)
Specifies whether or not DCMs are reset when SHUTDOWN and AGHIGH
are performed. SHUTDOWN and AGHIGH are most commonly utilized when
using a partial reconfiguration flow.
By default, this property
is set to False (checkbox is blank), and DCMs are not reset.
- DCI Update Mode (Virtex-4,Virtex-5, Virtex-6, and Spartan-3 devices only)
Specifies how often the DCI (Digitally Controlled Impedance)
IO standards in your design are allowed to have their impedance adjusted.
Select an option from the drop-down list.
- Continuous
Impedance adjustments are made continuously.
- As Required
Impedance adjustments are made only when needed.
- Quiet (Off)
After an initial impedance match is achieved, no further impedance
adjustments occur.
By default, this property is set to As Required.
- Enable External Master Clock (Spartan-6 devices only)
Allows an external clock to be used as the configuration clock
for all master modes. The external clock must be connected to the
dual-purpose USERCCLK pin.
By default, this property is set
to False (checkbox is unchecked).
- Setup External Master Clock Division (Spartan-6 devices only)
Note This property is only available if the Enable External Master
Clock property is set to True (checkbox is checked).
Determines
if the external master configuration clock is divided internally.
Select a value from the drop-down list. Allowable values are 1 and
all even numbers from 2 to 1022.
By default, this property is
set to 1, and the clock is not divided.
- Set SPI Configuration Bus Width (Spartan-6 devices only)
Sets the SPI bus to Dual (x2) or Quad (x4) mode for Master
SPI configuration from third party SPI Flash devices.
By default,
this property is set to 1.
- Fallback Reconfiguration (Advanced) (Virtex-5 and Virtex-6 devices only)
Specifies whether or not to enable the FPGA to attempt a configuration
from the fallback bitstream if configuration of the selected bitstream
fails. This feature is used mostly in MultiBoot systems.
By
default, this property is set to Enable.
- Starting Address for Fallback Configuration (Virtex-6 devices
only)
Specifies the starting address for a fallback or warm boot
configuration.
By default, this address is set to 0x00000000.
- Watchdog Timer Mode (Advanced) (Virtex-5 and Virtex-6 devices only)
Specifies whether the 24-bit Watchdog Timer register (TIMER)
that controls fallback configuration is enabled for bitstream configuration
or user operation. For more information, see the
Device User Guide for the device you are targeting.
- Off
Disables the Watchdog Timer.
- Config
Enables the Watchdog Timer for Configuration Mode only.
- User
Enables the Watchdog Timer for User Mode only.
By default, this property is set to Off.
- Watchdog Timer Value (Advanced) (Virtex-5, Virtex-6, and Spartan-6 devices only)
Note This property is only available for Virtex-5 and Virtex-6 devices
when the Watchdog Timer Mode is set to Config or User.
Sets
the value for the Watchdog Timer.
By default, this property
is set to xFFFF for Spartan-6 devices. For Virtex-5 and Virtex-6 devices, the default
is x000000.
- Place MultiBoot Settings into Bitstream (Advanced) (Spartan-3A and Spartan-6 devices only)
Enables MultiBoot configuration.
By default, this property
is set to False (checkbox is blank).
- MultiBoot: Starting Address for Next Configuration (Advanced) (Spartan-3A and Spartan-6 devices only)
Note This property is only available when the Place MultiBoot
Settings into Bitstream property is set to True (checkbox is checked).
Sets the starting address for the next configuration in a MultiBoot
setup.
By default, this property is set to 0x00000000.
- MultiBoot: Use New Mode for Next Configuration
(Advanced) (Spartan-3A and Spartan-6 devices only)
Note This property is only available when the Place MultiBoot
Settings into Bitstream property is set to True (checkbox is checked).
Selects between the mode value on the mode pins or the mode value
specified in the bitstream by the MultiBoot: Next Configuration Mode
property. If this property is set to True (checkbox is checked), the
mode value specified by the MultiBoot: Next Configuration Mode property
overrides the value on the mode pins during a subsequent MultiBoot
configuration. If this property is set to False (checkbox is blank),
the mode value on the mode pins is used instead.
By default,
this property is set to True (checkbox is checked).
- MultiBoot: Next Configuration Mode (Advanced) (Spartan-3A and Spartan-6 devices only)
Note This property is only available when the MultiBoot: Use
New Mode for Next Configuration property is set to True (checkbox
is checked).
Sets the configuration mode for the next configuration
in a MultiBoot setup.
By default, this property is set to 0x001.
- MultiBoot: Starting Address for Golden Configuration
(Advanced) (Spartan-6 devices only)
Note This property is only available when the Place MultiBoot
Settings into Bitstream property is set to True (checkbox is checked).
Sets the address in GENERAL3,4 for the golden configuration image.
By default, this property is set to 0x00000000.
- MultiBoot: User-Defined Register for Failsafe Scheme
(Advanced) (Spartan-6 devices only)
Note This property is only available when the Place MultiBoot
Settings into Bitstream property is set to True (checkbox is checked).
Sets the address of the GENERAL5 register, which is a 16-bit register
that allows users to store and access any extra information desired
for the failsafe scheme.
By default, this property is set to
0x0000.
- SelectMAP Abort Sequence (Advanced) (Virtex-5 devices only)
Specifies whether or not to enable the SelectMAP Abort sequence.
If disabled, the signal sequence that normally results in a SelectMAP Abort
operation will be ignored. For compatibility with other FPGA families,
this should only be disabled during debug operations.
By default,
this property is set to Enable.
- BPI Reads Per Page (Advanced) (Virtex-5 and Virtex-6 devices only)
For BPI configuration, specifies the number of reads required
per page of Flash memory.
By default, this property is set to
1.
- Cycles for First BPI Page Read (Advanced) (Virtex-5 and Virtex-6 devices only)
Note This property is only available if the BPI Reads Per Page
property is set to 4 or 8.
Sets the cycle number for a valid
read of the first page. This helps to synchronize BPI configuration
with the timing of page mode operations in Flash devices.
By
default, this property is set to 1.
- Power Down Device if Over Safe Temperature (Advanced) (Virtex-5 and Virtex-6 devices only)
Enables the device to shut down when the system monitor detects
a temperature beyond the acceptable operational maximum.
By
default, this property is set to False (checkbox is blank).
© Copyright 1995–2009, Xilinx®
Inc. All rights reserved.