Generating Post-Place and Route Static Timing

ISE

After placing and routing your design, this process generates a post-place and route static timing report. A post-place and route static timing report incorporates timing delay information to provide a comprehensive timing summary of your design. You can customize the report contents to help you determine how well your design has met the timing requirements.

If a placed and routed design has met all of your timing constraints, then you can then create configuration data. If you identify problems in the timing report, you can redesign the logic paths to use fewer levels of logic, tag the paths for a specialized routing resources, move to a faster device, or allocate more time for the paths.

You can generate one of two report types:

Error report, which lists timing errors and associated net and path delay information.
Verbose report, which lists delay information for all nets and paths.

Note When you run the Place and Route (PAR) process, this process is run automatically and a Post-Place & Route Static Timing Report is automatically generated.

To Generate Post-Place & Route Static Timing

In the Design panel, select Implementation from the Design View drop-down list.
In the Hierarchy pane, select the top module .
In the Processes pane, expand Implement Design, and expand Place & Route.
Right-click Generate Post-Place & Route Static Timing, and select Process Properties. Make the appropriate selections for the report details in the Post-Place & Route Static Timing Report Properties.
Double-click Generate Post-Place & Route Static Timing.

After running this process, you can run the Analyze Post-Place & Route Static Timing process to open the static timing report and your design NCD file for further timing analysis.

Note You can also view a text-based version of this report in the Design Summary. For more information, see Design Summary Overview and Viewing Messages and Reports.