Manually Placing and Routing (FPGA Editor)

ISE

You can use FPGA Editor to manually place and route critical components of your design before running the Place & Route process. After running the Map process, the output design is a Native Circuit Description (NCD) file that physically represents the design mapped to components of the Xilinx® FPGA, such as CLBs and IOs. The FPGA Editor requires an NCD file as input.

Note Manually routing sections of the design is not recommended unless absolutely necessary.

To Manually Place and Route a Design

In the Design panel, select Implementation from the Design View drop-down list.
In the Hierarchy pane, select the top module .
In the Processes pane, expand Implement Design, and expand Map.
Double-click Manually Place & Route (FPGA Editor).

FPGA Editor launches and displays the routed design NCD file. FPGA Editor reads from and writes to a Physical Constraints File (PCF) as follows:

When you create a constraint in FPGA Editor, the constraint is written to the PCF file whenever you save your design.
When you delete a constraint in FPGA Editor and then save the design file, the constraint is commented out in the PCF file and is not removed.

Note For more information on using FPGA Editor, see the FPGA Editor Help.

After running this process, you can perform any of the following:

If you created Directed Routing constraints, rerun the Place & Route process to lock the manual routing in your design.
Otherwise, run the Place & Route process in Reentrant mode. In the Place & Route Properties set the Place & Route Mode property to Reentrant Route.