ISE
Viewing and Editing a Routed Design (FPGA Editor)
You can view or edit your routed design in FPGA Editor to fine tune your design or to improve the performance of the automatic place and route tools. After placing and routing your design, the Native Circuit Description (NCD) output file can then be viewed or edited in FPGA Editor.
Note Manually routing sections of the design is not recommended unless absolutely necessary.
To View/Edit a Routed design
  1.  In the Design panel, select Implementation from the Design View drop-down list. Image
  2.  In the Hierarchy pane, select the top module Image.
  3.  In the Processes pane, expand Implement Design, and expand Place & Route.
  4.  Double-click the View/Edit Routed Design (FPGA Editor) process.
FPGA Editor launches and displays the routed design NCD file. FPGA Editor reads from and writes to a Physical Constraints File (PCF) as follows:
  •  When you create a constraint in FPGA Editor, the constraint is written to the PCF file whenever you save your design.
  •  When you delete a constraint in FPGA Editor and then save the design file, the constraint is commented out in the PCF file and is not removed.
Note For more information on using FPGA Editor, see the FPGA Editor Help.
After running this process, you can perform any of the following:
  •  If you created Directed Routing constraints, rerun the Place & Route process to lock the manual routing in your design.
  •  Otherwise, run the Place & Route process in Reentrant mode. In the Place & Route Properties set the Place & Route Mode property to Reentrant Route.

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