Virtex-5 Boards

This is the PDF for the AFX-FF324 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF324-Gerber.zip
• V5-AFX-FF324-PCB.pcb

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

This user guide describes the features and operation of the Virtex®-5 LX FPGA prototype platform and provides instructions to configure chains of FPGAs and serial PROMs.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This user guide describes the features and operation of the Virtex®-5 LXT, SXT, and FXT prototype platforms and describes how to configure chains of FPGAs and serial PROMs.

This is the PDF for the AFX-FF665 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF665-Gerber.zip
• V5-AFX-FF665-PCB.brd

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This is the PDF for the AFX-FF676 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF676-Gerber.zip
• V5-AFX-FF676-PCB.pcb

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This user guide describes the features and operation of the Virtex®-5 LX FPGA prototype platform and provides instructions to configure chains of FPGAs and serial PROMs.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This user guide describes the features and operation of the Virtex®-5 LXT, SXT, and FXT prototype platforms and describes how to configure chains of FPGAs and serial PROMs.

This is the PDF for the AFX-FF1136 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF1136-Gerber.zip
• V5-AFX-FF1136-PCB.brd

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This is the PDF for the AFX-FF1153 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF1153-PCB.pcb
• V5-AFX-FF1153-Gerber.zip

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

This user guide describes the features and operation of the Virtex®-5 LX FPGA prototype platform and provides instructions to configure chains of FPGAs and serial PROMs.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This user guide describes the features and operation of the Virtex®-5 LXT, SXT, and FXT prototype platforms and describes how to configure chains of FPGAs and serial PROMs.

This is the PDF for the AFX-FF1738 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF1738-Gerber.zip
• V5-AFX-FF1738-PCB.brd

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems Products.

This is the PDF for the AFX-FF1760 schematics. The schematic source files (Viewdraw) and other related board files are listed below.

Design File(s):

• V5-AFX-FF1760-Gerber.zip
• V5-AFX-FF1760-PCB.brd

This user guide describes the features and operation of the Virtex®-5 LX FPGA prototype platform and provides instructions to configure chains of FPGAs and serial PROMs.

This user guide provides a detailed description of each component and peripheral available on the ML501 Evaluation Platform. The ML501 board is a low-cost, entry-level platform for evaluation of Virtex®-5 LX FPGAs.

This is the PDF file of the ML501 schematics. The schematic source files (Viewdraw), Gerber plots, and other board-related files are accessible from the link below.

Design File(s):

• ml501_20061010_bw.pdf : docs.htm

This user guide introduces several designs that demonstrate Virtex™-5 LX device features using the ML501 Evaluation Platform.

This tutorial provides step-by-step instructions for setting up and using the Virtex™-5 ML501 evaluation platform. The ML501 platform comes with a number of pre-installed demonstration and set-up programs. These programs are available on the System ACE interface, Platform Flash, and SPI Flash. This document guides designers through set-up and demonstration procedures.

Design File(s):

• Reference Designs

This application note illustrates how to measure the network performance of the XPS LocalLink Tri Mode Ethernet MAC (TEMAC) in an embedded processor system running the Treck TCP/IP stack.

Design File(s):

• xapp1043_mb.zip
• xapp1043_ppc405.zip

Post-Configuration Access to SPI Flash Memory with Virtex®-5 FPGAs.

This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTP or GTX transceiver.

Design File(s):

• ML507 designs
• ML506 designs
• ML505 designs

The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505, ML506, and ML507 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML50x boards.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

The ML50x boards enable designers to investigate and experiment with features of Virtex®-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

This is the PDF for ML505, ML506, and ML507 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

This reference system demonstrates the functionality of the PLBv46 Endpoint Bridge for PCI Express® used in the Xilinx ML505 Embedded Development Platform.

Design File(s):

• Design File for XAPP1030

This guide provides a Video Over IP overview. It discusses the ASI to IP Bridge and the IP to ASI Bridge.

This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTP or GTX transceiver.

Design File(s):

• ML507 designs
• ML506 designs
• ML505 designs

The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505, ML506, and ML507 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML50x boards.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

The ML50x boards enable designers to investigate and experiment with features of Virtex®-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

To communicate that Xilinx is discontinuing certain Development Systems products

This is the PDF for ML505, ML506, and ML507 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

The XGI SuperClock Module User Guide provides an overview of functionality, operation, and configuration of the SuperClock module add-on board.

This is the PDF for the ML52x power module schematics.

This is the PDF file of the ML523 Schematic. The ML523 fab drawings, Gerber files, PCB files, and schematic files (Viewdraw) can be found below.

Design File(s):

• ML523_Gerber.zip
• ML523_PCB.pdf
• ML523_PCB.brd

This application note describes the implementation of SerDes Framer Interface Level 4 Phase 2 (SFI4.2) in a Virtex®-5 FPGA XC5VFX70T.

Design File(s):

• xapp877.zip

This user guide describes the features and operation of the Virtex®-5 LXT and FXT FPGAs series of RocketIO™ characterization platforms, which includes the ML521, ML523, and ML525 boards.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

This notification is to communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products

This user guide describes the Virtex®-5 FPGA ML550 Networking Interfaces board, which is the heart of the Virtex-5 FPGA ML550 Source-Synchronous Interfaces Tool Kit.

Design File(s):

• ug202.zip

This is the PDF file of the ML550 Schematic.

This application note describes how to interface a Fujitsu MB86064 digital-to-analog converter (DAC) with parallel low-voltage differential signaling (LVDS) inputs to a Virtex®-5 FPGA utilizing the dedicated I/O functions of the FPGA family.

Design File(s):

• xapp873.zip

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

This notification is to communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products

The reference designs enable customers to jumpstart their PCI Express® application development. All reference designs are provided as-is.

This is the PDF for the ML555 schematics. The schematic source files (Viewdraw) and other related ML555 board files are listed below.

Design File(s):

• ML555_Schematics_Source.zip
• ML555_BOM.xls
• ML555_Assembly_Drawing.zip

This reference system demonstrates the functionality of the PLBv46 Endpoint Bridge for PCI Express® used in the Xilinx ML555 PCI/PCI Express Development Platform.

Design File(s):

• Design File for XAPP1000

This user guide describes the Virtex™-5 FPGA ML555 Development Kit for PCI and PCI Express designs.

This application note describes how to interface a Fujitsu MB86064 digital-to-analog converter (DAC) with parallel low-voltage differential signaling (LVDS) inputs to a Virtex®-5 FPGA utilizing the dedicated I/O functions of the FPGA family.

Design File(s):

• xapp873.zip

To communicate that Xilinx is discontinuing certain Development Systems Products.

This notice is to communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

This user guide describes the Virtex®-5 FPGA ML561 Memory Interfaces Development Board, which is the heart of the Virtex-5 FPGA ML561 Memory Interfaces Tool Kit. The tool kit provides a complete development platform to interface with external memory devices for designing and verifying applications based on the Virtex-5 LXT Platform.

Design File(s):

• ML561 MIG Reference Design Files

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products.

This Answer Record lists all known issues with the ML561 Development Board.

This notification is to communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products

The XGI SuperClock Module User Guide provides an overview of functionality, operation, and configuration of the SuperClock module add-on board.

This is the PDF for the ML52x power module schematics.

This is the PDF file for the ML521 schematics.

Design File(s):

• ML521_Schematics.zip

This is the ML521 BRD file for the PCB layout.

This is the ZIP of the ML521 Gerber files.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

This user guide describes the features and operation of the Virtex®-5 LXT and FXT FPGAs series of RocketIO™ characterization platforms, which includes the ML521, ML523, and ML525 boards.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products.

This notification is to communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products

This is the PDF file of the ML525 Schematic. The ML525 fab drawings, Gerber files, PCB files, and schematic files can be found below.

Design File(s):

• ML525_Gerber.pdf
• ML525_Layout.zip
• ML52x PWR Module Schematics

The XGI SuperClock Module User Guide provides an overview of functionality, operation, and configuration of the SuperClock module add-on board.

To communicate that Xilinx is discontinuing certain Development Systems products relates to LogiCORE™ IP, Image Processing Pipeline and Xilinx® Development Systems Kits and Boards Products on While Supplies Last.

To communicate that Xilinx is discontinuing certain Development Systems products - LogiCORE™, IEEE 802 Compatible Viterbi Decoder, University Platform Cable USB-II LeadFree, University Parallel Download Cable and Xilinx Development Systems Products on While Supplies Last.

This user guide describes the features and operation of the Virtex®-5 LXT and FXT FPGAs series of RocketIO™ characterization platforms, which includes the ML521, ML523, and ML525 boards.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems Products.

To communicate that Xilinx is discontinuing certain Development Systems products.

This notification is to communicate that Xilinx is discontinuing certain Development Systems products.

To communicate that Xilinx is discontinuing certain Development Systems products

This application note describes how the standard network performance suite Netperf is used to measure XPS LL TEMAC performance with MontaVista Linux 4.0.

Design File(s):

• xapp1127.zip

This application note outlines the techniques for debugging PowerPC® 440 processor systems in hardware and simulation.

Design File(s):

• xapp1060.zip

This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTP or GTX transceiver.

Design File(s):

• ML507 designs
• ML506 designs
• ML505 designs

Previous generations of Xilinx® FPGAs supported a Master Parallel Configuration Mode which allowed the FPGA to configure itself directly from a parallel (byte wide) PROM. The Virtex® family of Xilinx FPGAs does not utilize a Master Parallel mode. This application note describes a simple interface design to configure a Virtex device from a parallel EPROM using the SelectMAP configuration mode.

Design File(s):

• xapp137.zip

This getting started guide is designed to help you quickly and efficiently develop embedded systems using a fully integrated development platform.

The ML505/ML506/ML507 Getting Started Tutorial provides step-by-step instructions for setting up and using the Virtex®-5 ML505, ML506, and ML507 Evaluation Platforms. These boards come with a number of pre-installed demonstrations. This tutorial guides you through these demonstrations and provides instructions to run them on the ML50x boards.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

This reference system demonstrates the functionality of the PLBv46 Endpoint Bridge for PCI Express® used in the Xilinx ML507 Embedded Development Platform.

Design File(s):

• xapp1040.zip

This user guide showcases various features of the Virtex®-5 FXT FPGA ML507 development board. It describes the hardware platform, the HelloWorld software application, and the BlueCat Linux images.

Design File(s):

• ug511_mb_emb_ref.zip
• ug511_ppc440_emb_ref.zip

The ML50x boards enable designers to investigate and experiment with features of Virtex®-5 FPGAs. This user guide describes the features and operation of the ML505 (LXT), ML506 (SXT), and ML507 (FXT) Evaluation Platforms.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

This is the PDF for ML505, ML506, and ML507 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

Design File(s):

• ML507 docs
• ML506 docs
• ML505 docs

This is a getting started guide for the Xilinx® MicroBlaze™ and PowerPC® Development Kit.

This user guide introduces several designs that demonstrate Virtex®-5 device features using the ML510 (FXT) Embedded Development Platform. The provided designs include processing systems based on the embedded PowerPC® 440 processor block, the MicroBlaze™ soft processor, the integrated Tri-mode Ethernet MAC, and the RocketIO™ GTX transceiver.

Design File(s):

• ML510 reference designs

This manual accompanies the ML510 Embedded Development Platform and contains information about the ML510 hardware and software tools. The ML510 offers designers a versatile Virtex®-5 FXT platform for rapid prototyping and system verification.

Design File(s):

• ML510 docs

This is the PDF for the ML510 schematics. The PCB files (Allegro 15.x) and schematic source files (Viewdraw) are accessible from the link below.

Design File(s):

• ML510 docs