Virtex-6 FPGA User Guides

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Virtex-6 FPGA User Guides

Date	Name

11/18/2011	Virtex-6 FPGA Configuration User Guide(application/x-download, ver 3.4, 6.35 MB ) This all-encompassing configuration guide includes chapters on configuration interfaces (serial and parallel), multi-bitstream management, bitstream encryption, boundary-scan and JTAG configuration, and reconfiguration techniques for Virtex®-6 FPGAs. Was this document helpful? Yes \| No
09/21/2010	Virtex-6 FPGA Integrated Block for PCI Express User Guide(PDF, ver 5.1, 12.33 MB ) This guide describes the function and operation of the Virtex®-6 FPGA Integrated Block for PCI Express®, including how to design, customize, and implement it. This solution supports the legacy TRN interface for the customer user interface. Was this document helpful? Yes \| No
11/23/2011	Virtex-6 FPGA Packaging and Pinout Specifications(PDF, ver 2.4, 15.84 MB ) This specification includes the tables for device/package combinations and maximum I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and thermal specifications. Was this document helpful? Yes \| No
01/27/2012	Device Reliability Report, Fourth Quarter 2011(PDF, ver 8.1, 2.2 MB ) Summary of the reliability test data and results for Xilinx devices updated four times per year. Was this document helpful? Yes \| No
02/03/2012	Virtex-6 FPGA Configurable Logic Block User Guide(PDF, ver 1.2, 1.81 MB ) This guide describes the capabilities of the configurable logic blocks (CLBs) available in all Virtex®-6 devices. Was this document helpful? Yes \| No
08/16/2010	Virtex-6 FPGA SelectIO Resources User Guide(PDF, ver 1.3, 5.79 MB ) This guide describes the SelectIO™ resources available in all the Virtex®-6 devices. Was this document helpful? Yes \| No
07/11/2011	Virtex-6 FPGA Clocking Resources User Guide(PDF, ver 2.0, 1.93 MB ) This guide describes the clocking resources available in all the Virtex®-6 devices, including the MMCM and Clock Buffers. Was this document helpful? Yes \| No
04/22/2011	Virtex-6 FPGA Memory Resources User Guide(PDF, ver 1.6, 2.35 MB ) This guide describes the Virtex®-6 device block RAM and FIFO capabilities. Was this document helpful? Yes \| No
07/27/2011	Virtex-6 FPGA GTX Transceivers User Guide(PDF, ver 2.6, 11.86 MB ) This guide describes the GTX transceivers available in all the Virtex®-6 FPGAs except the XC6VLX760. Was this document helpful? Yes \| No
06/29/2011	Virtex-6 FPGA GTH Transceivers User Guide(PDF, ver 2.2, 5.4 MB ) This guide describes the GTH transceivers available in the Virtex®-6 HXT FPGAs. Was this document helpful? Yes \| No
03/01/2011	Virtex-6 FPGA Embedded Tri-Mode Ethernet MAC User Guide(PDF, ver 1.3, 6.4 MB ) This guide describes the dedicated tri-mode Ethernet media access controller (TEMAC) available in all the Virtex®-6 FPGAs except the XC6VLX760. Was this document helpful? Yes \| No
02/14/2011	Virtex-6 FPGA DSP48E1 Slice User Guide(PDF, ver 1.3, 1.79 MB ) This guide describes the DSP48E1 slice in Virtex®-6 FPGAs and includes configuration examples. Was this document helpful? Yes \| No
06/14/2010	Virtex-6 FPGA System Monitor User Guide(PDF, ver 1.1, 2.83 MB ) This guide describes the System Monitor functionality. Was this document helpful? Yes \| No
02/11/2010	Virtex-6 FPGA GTX Transceiver Signal Integrity Simulation Kit (Synopsys HSPICE) User Guide(PDF, ver 1.1, 2.22 MB ) The Virtex®-6 FPGA GTX Transceiver Signal Integrity Simulation Kit for Synopsys HSPICE enables signal integrity simulations of a communication link between Virtex-6 FPGA GTX transceivers. This kit includes models of the line driver of the transmitter and the analog front end of the receiver of the GTX transceivers. Was this document helpful? Yes \| No
06/24/2011	Virtex-6 FPGA GTX Transceiver Signal Integrity Simulation Kit User Guide For Mentor Graphics HyperLynx(PDF, ver 1.1.1, 4.7 MB ) This guide describes the Virtex®-6 FPGA GTX Transceiver Signal Integrity Simulation (SIS) Kit for Mentor Graphics HyperLynx. Was this document helpful? Yes \| No
06/10/2010	Virtex-6 FPGA PCB Design Guide(PDF, ver 1.2, 10.2 MB ) This guide provides information on PCB design for Virtex®-6 devices, with a focus on strategies for making design decisions at the PCB and the interface level. Was this document helpful? Yes \| No

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