Virtex-6 FPGA White Papers

Targeted design platforms are simpler, smarter, and more strategically viable design platforms that offer customers the optimum in flexibility, accessibility, applicability, and time to market.

At 40 and 45 nm process nodes, power has become the primary factor for FPGA selection. Spartan®-6 and Virtex®-6 FPGAs offer lower power, simpler power systems and PCB complexity, better reliability, and lower system cost. This white paper details how Xilinx designed for this new reality in Spartan-6 (45 nm) and Virtex-6 (40 nm) FPGA families, achieving dramatic power reductions over previous generation devices.

The FPGA Mezzanine Card (FMC) standard, developed by a consortium of companies ranging from FPGA vendors to end users, specifically targets FPGAs, increasing I/O flexibility and lowering costs in a broad range of applications.

FPGAs enabled with serial I/O offer the ideal balance of bandwidth, density, performance, flexibility, and cost for SoC designs. Xilinx offers a portfolio of serial I/O technology that addresses the full spectrum of bandwidth requirements for products ranging from commercial video displays to broadcast video ultra-high bandwidth wired telecommunications systems.

EasyPath®-6 FPGAs are the industry's only design-specific FPGA solution to offer seamless cost reduction for complex platform FPGA designs. Unlike traditional approaches that require design conversion to structured ASICs or standard-cell ASICs, the EasyPath-6 technology cost reduction is automatic, immediate, and entirely risk-free.