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ISE Design Suite

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Document Alert / Changes

Xilinx XTP025 IP Release Notes Guide Updated for ISE 14.5 and Vivado 2013.1 Design Suite releases

Xilinx ZC702 Evaluation Board for the Zynq-7000 XC7Z020 All Programmable SoC User Guide Updated document; see revision history.

Design Advisory Master Answer Record for Spartan-3A/3AN/3A DSP FPGAs New Design Advisory
(Xilinx Answer 55037) "Design Advisory for Spartan-3A and Spartan-6: After SelectMAP configuration, when Readback CRC is enabled and an ABORT is triggered spurious failures might be flagged in Readback CRC"

Design Advisory Master Answer Record for Spartan-6 FPGA New Design Advisory
(Xilinx Answer 55037) "Design Advisory for Spartan-3A and Spartan-6: After SelectMAP configuration, when Readback CRC is enabled and an ABORT is triggered spurious failures may be flagged in Readback CRC"