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Zynq UltraScale+ MPSoC Package Device Pinout Files

  SBVA484 SFVA625 SFVB784 SFVC784 FBVB900 FFVC900 FFVB1156 FFVC1156 FFVB1517 FFVF1517 FFVC1760 FFVD1760 FFVE1924
XCZU2CG SBVA484 SFVA625   SFVC784                  
XCZU2EG SBVA484 SFVA625   SFVC784                  
XCZU3CG SBVA484 SFVA625   SFVC784                  
XCZU3EG SBVA484 SFVA625   SFVC784                  
XCZU4CG       SFVC784 FBVB900                
XCZU4EG       SFVC784 FBVB900                
XCZU4EV       SFVC784 FBVB900                
XCZU5CG       SFVC784 FBVB900                
XCZU5EG       SFVC784 FBVB900                
XCZU5EV       SFVC784 FBVB900                
XCZU6CG           FFVC900 FFVB1156            
XCZU6EG           FFVC900 FFVB1156            
XCZU7CG         FBVB900     FFVC1156   FFVF1517      
XCZU7EG         FBVB900     FFVC1156   FFVF1517      
XCZU7EV         FBVB900     FFVC1156   FFVF1517      
XCZU9CG           FFVC900 FFVB1156            
XCZU9EG           FFVC900 FFVB1156            
XCZU11EG               FFVC1156 FFVB1517 FFVF1517 FFVC1760    
XCZU15EG           FFVC900 FFVB1156            
XCZU17EG                 FFVB1517   FFVC1760 FFVD1760 FFVE1924
XCZU19EG                 FFVB1517   FFVC1760 FFVD1760 FFVE1924
Download ZIP

Note: The zip file includes ASCII package files in TXT format and in CSV format. The format of this file is described in UG1075.

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