Recorded Lecture: System Generator Getting Started Training

Duration: Each module is approximately 5 to 6 mins.

System Generator enables the use of Simulink for designing Xilinx FPGAs. This recorded e-learning training will provide a jump start for those who want to evaluate this flow.

After completing this training, you will be able to:

• Create a DSP design that includes memories and control using Simulink and implement that design into a Xilinx FPGA
• Design highly efficient FIR filters for the Xilinx device architectures
• Define fixed-point numeric precision abstractly using the Xilinx DSP blockset

Module Descriptions

• Module 1 - Introduction to System Generator: Provides a high-level overview of the System Generator features and capabilities.
• Module 2 - Design Creation Basics: Introduces the basics of creating and implementing a DSP design using System Generator.
• Module 3 - Signal Routing: Covers the use of the System Generator routing blocks for extracting and manipulating the individual bits of a fixed-point signal.
• Module 4 - Implementing System Control: Covers the preferred methods for using System Generator to create finite state machines, logical control conditions, and the handling of bursty data typical of FFT and filtering operations.
• Module 5 - Multi-Rate Systems: Shows the proper way to create multi-rate systems using upsampling and downsampling of data.
• Module 6 - Memories: Covers proper usage of the Xilinx block RAM resources and the DSP blocks available for building DSP designs targeting Xilinx RAMs.
• Module 7 - Filter Design: Discusses methods for creating efficient FIR filters in the Xilinx devices, use of the FIR Compiler block for filter implementation, and use of the FDATool for filter design.