Zynq-7000 Extensible Processing Platform Block Diagram and Product Features
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Key Documentation
- Dual ARM Cortex™-A9 MPCore
- Up to 800MHz
- Enhanced with NEON Extension and Single & Double Precision Floating point unit
- 32kB Instruction & 32kB Data L1 Cache
- Unified 512kB L2 Cache
- 256kB on-chip Memory
- DDR3, DDR2 and LPDDR2 Dynamic Memory Controller
- 2x QSPI, NAND Flash and NOR Flash Memory Controller
- 2x USB2.0 (OTG), 2x GbE, 2x CAN2,0B 2x SD/SDIO, 2x UART, 2x SPI, 2x I2C, 4x 32b GPIO
- AES & SHA 256b encryption engine for secure boot and secure configuration
- Dual 12bit 1Msps Analog-to-Digital converter
- Up to 17 Differential Inputs
- Advanced Low Power 28nm Programmable Logic:
- 28k to 350k Logic Cells (approximately 430k to 5.2M of equivalent ASIC Gates)
- 240KB to 2180KB of Extensible Block RAM
- 80 to 900 18x25 DSP Slices (58 to 1080 GMACS peak DSP performance)
- PCI Express® Gen2x8 (in largest devices)
- 154 to 404 User IOs (Multiplexed + SelectIO™)
- 4 to 16 12.5Gbps Transceivers (in largest devices)
