Xilinx Core Generator System

Xilinx CORE Generator™ System accelerates design time by providing access to highly parameterized Intellectual Properties (IP) for Xilinx FPGAs and is included in the ISE® Design Suite. CORE Generator provides a catalog of architecture specific, domain-specific (embedded, connectivity and DSP), and market specific IP (Automotive, Consumer, Mil/Aero, Communications, AVB, etc.). These user-customizable IP functions range in complexity from commonly used functions, such as memories and FIFOs, to system-level building blocks, such as filters and transforms. Using these IP blocks can save days to months of design time. The highly optimized IP allows FPGA designers to focus efforts on building designs quicker while helping bring products to market faster.

You can also generate tailored HDL to quickly configure FPGA architectural elements such as MGTs and Ethernet and PCI Express hard blocks using the integrated LogiCORE™ GUI-based customizers and Core Generator Architecture Wizards. Through its seamless integration with the ISE development environment, the CORE Generator system streamlines your design process, improves design quality and helps you finish faster.

Specific IP from the CORE Generator IP catalog can be used in the designer methodology of choice:

•  For Logic designers using Project Navigator
•  For DSP algorithm designers using AccelDSP™ and Xilinx System Generator
•  For Embedded designers using Xilinx Platform Studio (XPS)

Key Features

• Included with all Editions of the ISE Design Suite as well as ISE WebPACK™
• Search for IP by keyword, or sort the IP listings alphabetically, or by function type. Also list IP core scheduled to be “Superseded” by newer versions and cores scheduled to be “Discontinued” can be viewed by selecting “All IP Versions”
• IP cores supported for selected device family can be viewed by selecting “Only IP Compatible with chosen part”
• Easy access to detailed information on each core (data sheets, user guides, release notes, licensing status, enhancement listings for new versions)
• Enhanced IP output:
  • Generation of ISE project files to facilitate integration and management of IP cores in Project Navigator
  • Selected video and image processing cores generate “EDK Pcore” to facilitate integration and management of IP cores within XPS projects
• Automated core upgrade to latest version capability is available for the following IP cores: Adder Subtracter, Accumulator, Binary Counter, Block Memory Generator, Complex Multiplier, CORDIC, Multiplier and RAM-based Shift Register
• Capability to allow regeneration of all project IP cores with different project settings than were originally used to generate the core

The CORE Generator IP catalog provides IP which include:

Targeted Design Platform	Types of IP	IP Cores
Base Platform	Building Blocks	Memories and FIFOs  Arithmetic Operators (Adder, Accumulator, Multiplier, Complex Multiplier, etc.)  Floating Point Operators
	Debug and Verification	ChipScope™ Pro Integrated Controller  Integrated Logic Analyzer  Virtual Input/Output
	FPGA Architecture features	Clocking Wizard  Memory Interface Generator (MIG)  RocketIO™ Multi-Gigabit Transceivers (MGTs)  System Monitor Wizard
Domain Specific	Connectivity	Standard bus interfaces such as PCI™ and PCI-X™  Networking Interfaces such as Ethernet, SPI-4.2, RapidIO, CAN and PCI EXPRESS®
	DSP Functions	DDS Compiler, FIR Compiler, FFT, etc.  Forward Error Correction IP such as Reed-Solomon Decoder and Encoder, Viterbi Decoder, etc.
	Video and Image Processing Embedded IP	Color-Space Converters  Color Conversion Matrix, Color Filter Array Interpolation, Image Processing Pipeline, etc.
Market Specific	Automotive and Industrial	CAN, Ethernet AVB, etc.
	Wired Telecommunications	Ten Gigabit Ethernet MAC, Tri-mode Ethernet MAC, etc.
	Wireless Telecommunications	LTE Channel Encoder/Decoder, 3GPP Searcher, etc.  CPRI, OBSAI and Serial Rapid IO, etc.