Xilinx Software Development Kit (SDK)

The Software Development Kit (SDK) is the Xilinx Integrated Design Environment for creating embedded applications on any of Xilinx' award winning microprocessors from Zynq®-7000 All Programmable SoCs, to the industry-leading MicroBlaze™. SDK is the first application IDE to deliver true homogenous and heterogenous multi-processor design and debug.

  • Zynq-7000 AP SoCs, PowerPC© 440 (Virtex®-5), PowerPC© 405 (Virtex-4), and MicroBlaze support
  • Optionally included with both the Vivado Design Suite or ISE Design Suite, or available as a separate free download for application developers
  • Based on Eclipse 3.8.2 and CDT 8.1.2 (as of 2013.3 release)
  • Complete Integrated Design Environment (IDE) that directly interfaces to both the Vivado and ISE embedded hardware design environment
  • Complete software design and debug flows supported, including multi-processor and hardware/software debug capabilities
  • Editor, compilers, build tools, flash memory management, and JTAG/GDB debug integration
  • Supported by Xilinx edition of Mentor Sourcery CodeBench Lite (version 2012.09)
  • Custom libraries and device drivers


System Debugger

New in SDK Xilinx introduces System Debugger, based on the Eclipse Target Communications Framework (TCF), System Debugger delivers true multi-processor SoC design and debug. For example, in a Zynq-based design, System Debugger displays both ARM CPUs and multiple MicroBlaze soft-processors, in the same debug session, through a single JTAG cable; for an uprecedented level of insight between the hardened processing system, and any additional processing that you've added to the programmable logic.

  • Based on the Eclipse Target Communication Framework (TCF)
  • Homogenous and heterogeneous multi-processor support
  • New in 2013.3 Linux application debug on the target
  • Hierarchical Profiling
  • Bare-metal and Linux development
  • Supporting both SMP and AMP designs
  • Associate hardware and software breakpoints per core
  • NEON™ library support


Custom Design Aware

Xilinx SDK understands the custom Xilinx-based embedded hardware design that has been defined in either the Vivado Design Suite or the Xilinx Platform Studio (XPS) with ISE. Based on this design, several key parameters are auto-configured, including memory maps, peripheral register settings, tools and library paths, compiler options, JTAG and flash memory settings, debugger connections, and Linux and bare-metal Board Support Packages (BSPs). This custom design-aware pre-configuration, combined with the auto-generation of critical system software, ensures that software development can begin with a minimal learning curve.

Drivers and Libraries

SDK includes user-customizable drivers for all supported Xilinx hardware IPs, POSIX compliant kernel library and networking and file handling libraries. These libraries and drivers can scale for the custom-design based on feature needs, memory requirements and hardware capabilities.

Integrated Debug Now Including Hardware/Software Cross-trigger and Debug

SDK includes an integrated debugger supporting Zynq-7000 AP SoC, MicroBlaze, and PowerPC processors. You can set breakpoints or watchpoints, step through program execution, view the program variables and stack, and view the contents of the memory in the system. You can also simultaneously debug programs running on different processors (in a multi-processor system), all from within the same debug environment.

SDK supports critical hardware/software trigger and debug. The software programmer can specify in SDK the application code breakpoints that will initiate a cross-trigger and Vivado will then capture and display hardware trace data when those conditions are hit. Software engineers can trace and debug the embedded system from the software design and debug environment.

Software Profiling and Optimization

Xilinx SDK includes profiling tools that help to identify bottle necks in the code that might occur due to the inteaction of functions that are executed within the programmable logic, and functions executed on the processor. Once identified, these bottle necks can be optimized by migrating the whole function to programmable logic, by optimizing the function code on the processor, or by splitting the function between processor and programmable logic. And new in the 2013.3 release SDK now supports hierarchical profiling - allowing the user to ciew which called sub-functions, or which calling functions are most affecting processs performance.

 
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