FPGA Connectivity Design
Connectivity Design Applications
FPGAs that provide multi-gigabit serial transceivers to implement high-speed serial protocols have become the platform of choice for a large and growing number of applications today. The flexibility to accommodate different protocols, line rates, and emerging standards has made the multi-gigabit serial transceiver the perfect companion to the flexible reprogrammable logic in FPGAs. Xilinx connectivity platforms accelerate a broad range of applications, including: wired communications routers and switchers, wireless radio head and baseband processing, audio video broadcast control switchers and routers, automotive driver assistance control applications, automotive infotainment applications, consumer set top boxes and much more. Specifically, Xilinx kits enable designs with industry standard high speed protocols including PCI-e, Ethernet, DDR3SDRAM, and other proprietary high-speed serial protocols.
Xilinx Connectivity Development Kits
Xilinx connectivity platforms enable the fastest deployment of customer end-product systems across the serial spectrum – mainstream through ultra-high end – and provide valuable benefits for architecting your application. Xilinx’s available kits directly address the mounting market challenges facing designers needing high-speed serial I/O by delivering optimized reference designs. To provide a simpler, more accessible solution, Xilinx has created fully-functional, fully-validated, and fully-supported connectivity targeted reference designs introduced in two new kits—the Virtex-6 FPGA Connectivity Kit and the Spartan-6 FPGA Connectivity Kit -that engineers can use to jump-start their connectivity-based designs.
Development Kits
Evaluation Kits
All Xilinx Virtex-6 and Spartan-6 FPGA boards include a FPGA Mezzanine Card (FMC) connector on the board
These kits provide an easy to use fully integrated development environment. A simple, easy-to-follow hardware setup guide enables the customer to bring up the demonstration of the connectivity targeted reference design. All Xilinx Virtex-6 and Spartan-6 FPGAs also include configurable SelectIO™ technology to support multi-voltage, multi-standard parallel connectivity technologies – HSTL, LVDS (SDR and DDR) and more. The customer can then evaluate the system performance of this connectivity targeted reference design through a performance monitor application. With these tools, the customer can modify and configure specific system parameters, tune the connectivity targeted reference design to their application requirements, and measure the system performance. The customer can then include the modifications and apply them to their specific design implementations.
Design Flows Tailored for Connectivity Methodologies
The ISE Design Suite: Logic Edition delivers a complete solution for connectivity design providing the front-to-back methodology and IP required to enable designers to achieve greater designer productivity, focus on design differentiation, shrink time to production, attain breakthrough performance, power and cost benefits. The Logic Edition includes Xilinx exclusive tools and technologies for design entry, synthesis, implementation, and verification to help achieve optimal design results in the shortest time.
Connectivity Design Training
Instructor-led Courses |
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| How to Design a Xilinx Connectivity System in 1 Day - Released March 2011
This workshop introduces you to fundamental connectivity concepts and techniques for implementation in Xilinx FPGAs. The focus is on fundamental aspects of transceivers, PCIe® technology, memory interfaces, and Ethernet MACs. Design examples and labs are drawn from the Connectivity Targeted Reference Design (TRD). In addition, an IBERT lab is available that highlights use of the MGT. - Read More |
| Designing a LogiCORE PCI Express System - Updated March 2011
Attending the Designing a LogiCORE PCI Express System will provide you a working knowledge of how to implement a Xilinx PCI Express® core in your applications. This course focuses on the implementation of a Xilinx PCI Express system within the Connectivity Targeted Reference Design (TRD). With this experience, you can improve your time to market with your PCIe core design. Various Xilinx PCI Express core products will be enumerated to aid you in selecting the proper solution. This course focuses on the AXI streaming interconnect. - Test Your Knowledge 
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| Designing with Multi-Gigabit Serial I/O - Updated March 2011
Learn how to employ GTP and GTX serial transceivers in your Spartan®-6 LXT FPGA or Virtex®-6 FPGA design. Understand and utilize the features of the RocketIO transceiver blocks, such as 8B/10B and 64B/66B encoding, channel bonding, clock correction, and comma detection. Additional topics include use of the Architecture Wizard, synthesis and implementation considerations, board design as it relates to the transceivers, and test and debugging. This course combines lectures with practical hands-on labs. - Test Your Knowledge 
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| Signal Integrity and Board Design for Xilinx FPGAs
- Updated June 2010
Learn when and how to apply signal integrity techniques to high-speed interfaces between Xilinx FPGAs and other components. This comprehensive course combines design technique and methodology with relevant background concepts of high-speed bus and clock design, including transmission line termination, loading, and jitter. - Test Your Knowledge
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| Designing with Ethernet MAC Controllers - Updated September 2010
Become acquainted with the various solutions that Xilinx offers for Ethernet connectivity. Learn the basics of the Ethernet standard, protocol, and OSI model while applying Xilinx solutions via hands-on laboratory exercises. Perform simulation to understand fundamental principles and obtain the knowledge to assess hardware design considerations and software development requirements.
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