UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Zynq UltraScale+ MPSoC for the System Architect

Release Date:
August 2017
Level:
Embedded System Architect 3
Duration:
2 days

Quick Links

Key Documentation

Audience

System architects interested in understanding the capabilities and ecosystem of the Zynq® UltraScale+™ MPSoC device.

Prerequisites

  • Suggested: Understanding of the Zynq-7000 architecture
  • Familiarity with embedded operating systems

Register

For class schedules as well as tuition and registration information, please contact one of our Authorized Training Providers.

Course Description

This two-day course is structured to provide system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.

Software Tools

  • Vivado® Design Suite 2017.1
    • May require special Zynq UltraScale+ MPSoC family license
  • Hardware emulation environment:
    • VirtualBox
    • QEMU
    • Ubuntu desktop
    • PetaLinux

Hardware

  • Host computer for running the above software*

* This course focuses on the Zynq UltraScale+ MPSoC architecture. Check with your local Authorized Training Provider for the specifics of the in-class lab environment or other customizations. The 2015.4 version of this class does not use a physical board, but rather a local emulation environment and the Vivado Design Suite.

Skills Gained

After completing this comprehensive training, you will know how to:

  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Identify mechanisms to secure and safely run the system
  • Outline the high-level architecture of the devices
  • Define the boot sequences appropriate to the needs of the system

Course Outline

Lab Lecture Demo

Day 1

  1. 1.1
    Zynq UltraScale+ MPSoC Overview Overview of the Zynq UltraScale+ MPSoC device.
  2. 1.2
    Zynq UltraScale+ MPSoC HW-SW Virtualization Covers the hardware and software elements of virtualization. The lab demonstrate how hypervisors can be used.
  3. 1.3
    QEMU Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.
  4. 1.4
    Zynq UltraScale+ MPSoC Security and Software Defines what safety and security is in the context of embedded systems and introduces several standards.

Day 2

  1. 2.1
    Zynq UltraScale+ MPSoC Power Management Overview of the PMU and the power-saving features of the device.
  2. 2.2
    Zynq UltraScale+ MPSoC System Coherency Learn how information is synchronized within the API and through the ACE/AXI ports.
  3. 2.3
    Zynq UltraScale+ MPSoC DDR and QoS Understand how DDR can be configured to provide the best performance for your system.
  4. 2.4
    Zynq UltraScale+ MPSoC Booting How to implement the embedded system, including the boot process and boot image creation.
  5. 2.5
    Zynq UltraScale+ MPSoC Ecosystem Support Overview of supported operating systems, software stacks, hypervisors, etc.
Page Bookmarked