Embedded Systems Design

Course Description

The Xilinx Zynq™ All Programmable System on a Chip (SoC) provides a new level of system design capabilities. This course brings experienced FPGA designers up to speed on developing embedded systems using the Embedded Development Kit (EDK). The features and capabilities of the Zynq All Programmable SoC as well as concepts, tools, and techniques are included in the lectures and labs. The hands-on labs provide students with experience designing, expanding, and modifying an embedded system, including adding and simulating a custom AXI-based peripheral.

Additionally, the features and capabilities of the Xilinx MicroBlaze™ soft processor are also included in the lectures and labs.

Release Date

August 2012

Level

Embedded Hardware 3

Training Duration

2 days

Who Should Attend?

Engineers who are interested in developing embedded systems with the Xilinx Zynq All Programmable SoC or MicroBlaze soft processor core using the Embedded Development Kit.

Prerequisites

• FPGA design experience
• Completion of the Essentials of FPGA Design course or equivalent knowledge of Xilinx ISE® software implementation tools
• Basic understanding of C programming
• Basic understanding of microprocessors
• Some HDL modeling experience

Software Tools

• Xilinx ISE Design Suite: Embedded or System Edition 14.2

Hardware

• Architecture: Zynq-7000 All Programmable SoC and 7 series FPGAs*
• Demo board: Zynq-7000 All Programmable SoC ZC702 or Zed or Kintex™-7 FPGA KC705 board*

* This course focuses on the Zynq-7000 All Programmable SoC and 7 series FPGA architectures. Check with your local Authorized Training Provider for the specifics of the in-class lab board or other customizations.

Skills Gained

After completing this comprehensive training, you will know how to:

• Describe the various tools that encompass the Xilinx Embedded Development Kit (EDK)
• Rapidly architect an embedded system containing a MicroBlaze™ or Cortex™-A9 processor by using the Base System Builder (BSB) or PS Configuration Wizard
• Utilize the Eclipse-based Software Development Kit (SDK) to develop software applications and debug software
• Create and integrate your own IP into the embedded processing environment
• Simulate your custom AXI interface-based peripheral by using a Bus Functional Model (BFM)

Course Outline

Day 1

• EDK Overview
• Base System Builder and the Processing System Configuration Wizard
• Lab 1: Hardware Construction with the Base System Builder or Processing System Configuration Wizard
• Software Development Using SDK
• Lab 2: Adding and Downloading Software
• Introduction to AXI
• Interrupts
• Adding Hardware to an Embedded Design
• Lab 3: Adding IP to a Hardware Design

Day 2

• MicroBlaze Processor Basics
• Cortex-A9 Processor Basics
• Designing Your Own AXI Peripheral Using the IPIC Interface
• Adding Your Own Peripheral to the IP Catalog
• Lab 4: Building Custom AXI IP for an Embedded System
• Bus Functional Model Simulation
• Lab 5: BFM Simulation
• Adding Your Own IP to the Embedded System
• Lab 6: Integrating a Custom Peripheral

Lab Descriptions

• Lab 1: Hardware Construction with the Base System Builder (Microblaze Processor) or Processing System Configuration Wizard (Zynq All Programmable SoC) – Create an XPS project by using a wizard to develop a basic hardware system and generate a series of netlists for the embedded design.
• Lab 2: Adding and Downloading Software – Complete the processes begun in Lab 1 using the SDK tools to create a software BSP and sample application. Configure the device and download the application.
• Lab 3: Adding IP to a Hardware Design – Add IP to an existing processing system using the System Assembly View in Xilinx Platform Studio. Configure the device and download the application.
• Lab 4: Building Custom AXI IP for an Embedded System – Create and add a custom AXI peripheral (LCD interface) to your design by using the Create and Import Peripheral Wizard.
• Lab 5: BFM Simulation – Use the ISim simulator to perform Bus Functional Model simulation to verify functionality of the LCD bus peripheral added in the preceding lab.
• Lab 6: Integrating a Custom Peripheral – Put it all together: add custom IP to the design project, then integrate the processor sub-system with other logic in an ISE software design project.

Customer Reviews 

• The instructor was excellent. He took his 20+ year experience working on FPGA's and wrapped them into teaching EDK plus some FPGA fundamentals.
  
  
  
• The course content and delivery was very good. I would highly recommend this course to anyone that is new to Embedded System Design.
  
  
  
• The courses are the best way to get knowledeable about using an FPGA.