Field Programmable Gate Array (FPGA)
What is an FPGA?
Field Programmable Gate Arrays (FPGAs) are semiconductor devices that are based around a matrix of configurable logic blocks (CLBs) connected via programmable interconnects. FPGAs can be reprogrammed to desired application or functionality requirements after manufacturing. This feature distinguishes FPGAs from Application Specific Integrated Circuits (ASICs), which are custom manufactured for specific design tasks. Although one-time programmable (OTP) FPGAs are available, the dominant types are SRAM based which can be reprogrammed as the design evolves. - Learn More
What is the difference between an ASIC and an FPGA?
ASIC and FPGAs have different value propositions, and they must be carefully evaluated before choosing any one over the other. Information abounds that compares the two technologies. While FPGAs used to be selected for lower speed/complexity/volume designs in the past, today’s FPGAs easily push the 500 MHz performance barrier. With unprecedented logic density increases and a host of other features, such as embedded processors, DSP blocks, clocking, and high-speed serial at ever lower price points, FPGAs are a compelling proposition for almost any type of design. - Learn More
FPGA Applications
Due to their programmable nature, FPGAs are an ideal fit for many different markets. As the industry leader, Xilinx provides comprehensive solutions consisting of FPGA devices, advanced software, and configurable, ready-to-use IP cores for markets and applications such as:
- Aerospace & Defense - Radiation-tolerant FPGAs along with intellectual property for image processing, waveform generation, and partial reconfiguration for SDRs.
- Automotive - Automotive silicon and IP solutions for gateway and driver assistance systems, comfort, convenience, and in-vehicle infotainment. - Learn how Xilinx FPGA's enable Automotive Systems
- Broadcast - Solutions enabling a vast array of broadcast chain tasks as video and audio finds its way from the studio to production and transmission and then to the consumer.
- Consumer - Cost-effective solutions enabling next generation, full-featured consumer applications, such as converged handsets, digital flat panel displays, information appliances, home networking, and residential set top boxes.
- High Performance Computing and Data Storage - Solutions for Network Attached Storage (NAS), Storage Area Network (SAN), servers, and storage appliances.
- Industrial - Xilinx FPGAs and targeted design platforms for Industrial, Scientific and Medical (ISM) enable higher degrees of flexibility, faster time-to-market, and lower overall non-recurring engineering costs (NRE) for a wide range of applications such as industrial imaging and surveillance, industrial automation, and medical imaging equipment.
- Medical - For diagnostic, monitoring, and therapy applications, the Virtex FPGA and Spartan® FPGA families can be used to meet a range of processing, display, and I/O interface requirements.
- Wired Communications - End-to-end solutions for the Reprogrammable Networking Linecard Packet Processing, Framer/MAC, serial backplanes, and more
- Wireless Communications - RF, base band, connectivity, transport and networking solutions for wireless equipment, addressing standards such as WCDMA, HSDPA, WiMAX and others.
FPGA Design Training
Instructor-led Courses |
|---|
| Essentials of FPGA Design - Updated March 2011
Use the ISE software tools to implement a design and gain a firm understanding of the Xilinx FPGA architecture. Learn the best design practices from the pros and understand the subtleties of the Xilinx design flow. - Test Your Knowledge 
|
| Designing for Performance - Updated March 2011
Attending the Designing for Performance class will help you create more efficient designs. This course can help you fit your design into a smaller FPGA or a lower speed grade for reducing system costs. In addition, by mastering the tools and the design methodologies presented in this course, you will be able to create your design faster, shorten your development time, and lower development costs. - Test Your Knowledge 
|
| Advanced FPGA Implementation - Updated March 2011
Advanced FPGA Implementation tackles the most sophisticated aspects of the ISE design suite and Xilinx hardware. Seven labs provide hands-on experience in this two-day training and cover the Xilinx Synthesis Technology (XST) tools. This course requires the Essentials of FPGA Design and Designing for Performance courses as prerequisites. An intermediate knowledge of Verilog or VHDL is strongly recommended as is at least six months of design experience with Xilinx tools and FPGAs. The lecture material in this course covers the ISE tools and the Spartan-6 and Virtex-6 FPGAs - Test Your Knowledge
|
| Essential Design with the PlanAhead Analysis and Design Tool - Updated March 2011
Learn to increase design performance and achieve repeatable results by using the PlanAhead™ software. Topics include: a product overview, synthesis and project tips, design analysis, creating a floorplan, improving performance, experimenting with implementation options, incremental methodology, block-based IP design, and I/O pin assignment. - Test Your Knowledge 
|
 Advanced Design with the PlanAhead Analysis and Design Tool - Updated March 2011
Learn to increase design performance and achieve repeatable performance by using the PlanAhead software tool. Topics include: synthesis and project tips, design analysis, creating a floorplan, improving performance with area constraints and Pblocks, design debugging with the ChipScope™ Pro tool, and design preservation with partitions. - Test Your Knowledge |
| Designing with the 7 Series Families - Released March 2011
Are you interested in learning how to effectively utilize 7 series architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course focuses on understanding as well as how to properly design for the primary resources found in this popular device family. - Test Your Knowledge |
| Designing with the Spartan-6 and Virtex-6 Families - Updated March 2011
Are you interested in learning how to effectively utilize Spartan-6 FPGA or Virtex-6 FPGA architectural resources? This course supports both experienced and less experienced FPGA designers who have already completed the Essentials of FPGA Design course. This course focuses on understanding as well as how to properly design for the primary resources found in these popular device families. - Test Your Knowledge |
| Designing with the Virtex-5 FPGA Family - Updated June 2009
Interested in learning how to effectively utilize Virtex-5 FPGA architectural resources? Targeted towards experienced Xilinx users who have already completed Essentials of FPGA Design and Designing for Performance, this course focuses on understanding as well as designing into several of the new and enhanced resources found in our newest device. - Test Your Knowledge
|
| Debugging Techniques Using the ChipScope Pro Tools - Updated March 2011
As FPGA designs become increasingly more complex, designers continue look to reduce design and debug time. The powerful, yet easy-to-use ChipScope Pro tool solution helps minimize the amount of time required for verification and debug. This two-day course will not only introduce you to the cores and tools and illustrate how to use the triggers effectively, but also show you effective ways to debug logic and high-speed designs—thereby decreasing your overall design development time. - Test Your Knowledge
|
| FPGA Design Techniques for Lower Cost
This course appeals to engineers who have an interest in developing low-cost products, particularly in high-volume markets. The course and exercises cover several different design techniques, which will be interesting and challenging for any digital designer regardless of the final application.
|
| ISE Design Tool Flow - Updated March 2011
ISE Design Tool Flow provides the overall context and framework for the development cycle of FPGAs. For those uninitiated to FPGA design, this course will arm you with the proper planning techniques, strategy, and FPGA tool flow to get up and designing an FPGA design now. - Test Your Knowledge
|
| Xilinx Partial Reconfiguration Tools & Techniques - Updated March 2011
This course demonstrates how to use the ISE, PlanAhead, and Embedded Development Kit (EDK) software tools to construct, implement, and download a Partially Reconfigurable (PR) FPGA design. You will gain a firm understanding of PR technology and learn how successful PR designs are completed. You will also identify best design practices and understand the subtleties of the PR design flow. - Test Your Knowledge |
FPGA Tutorials
FPGA Architecture Videos
 |
Virtex-6 Memory Resources Learn how to fully utilize the Virtex®-6 distributed memory, block memory, and FIFO resources, use the Memory Interface Generator (MIG) to build a custom memory controller for your off-chip memory component. More Released: Oct 2009 | Views: 6,201 |
 |
Virtex-6 Slice and I/O Resources Learn how to describe the basic slice and I/O resources available in Virtex-6 FPGAs. More Released: Oct 2009 | Views: 6,770 |
 |
Virtex-6 Clocking Resources Learn how to detail the clocking resources available in the Virtex-6 FPGA, specify the resources available in the Clock Management Tile (CMT), describe the basics of the PLL capabilities. More Released: Oct 2009 | Views: 4,408 |
 |
Spartan-6 Memory Resources Learn how to fully utilize the Spartan®-6 distributed and block memory resources, understand the features and limitations of the Spartan-6 dedicated memory controller block (MCB), use the Memory Interface Generator (MIG) to build your custom memory controller and design an appropriate interface to your off-chip memory component. More Released: Oct 2009 | Views: 3,106 |
 |
Spartan-6 Slice and I/O Resources Learn how to describe the basic slice and I/O resources available in Spartan-6 FPGAs. More Released: Oct 2009 | Views: 5,539 |
 |
Spartan-6 Clocking Resources Learn how to describe the global and I/O clock networks in the Spartan-6 FPGA, describe the clock buffers and their relationships to the I/O resources, describe the DCM capabilities in the Spartan-6 FPGA. More Released: Oct 2009 | Views: 5,456 |
FPGA Design Videos
 |
How to Configure an FPGA Learn how to describe the FPGA configuration pins, choose an appropriate FPGA configuration scheme, connect multiple FPGAs into a configuration daisy chain, and describe currently available prototyping hardware. More Updated: Dec 2010 | Views: 14,564 |
 |
Architecture Wizard and I/O Planning Learn how to list at least two uses for the Architecture Wizard, identify two features of PinAhead, and create quality pin assignments for Xilinx FPGAs. More Updated: July 2010 | Views: 7,574 |
 |
ChipScope Pro Software Overview Learn how to describe the value of the ChipScope™ Pro software, describe how it works, list available relevant cores, use the Core Generator and Core Inserter software, plan for debug, and debug with the ChipScope Pro software. Links to the labs are at the end of the recording. More Download Lab Files (5.7MB zip) Updated: Nov 2010 | Views: 7,631 |
 |
Global Timing Constraints Learn how to apply global timing constraints to a simple synchronous design, use the Xilinx Constraints Editor to specify global timing constraints. More Updated: Dec 2010 | Views: 5,509 |
 |
Timing Closure After completing this course you will be able to describe the overall flow for gaining timing closure, specify the key elements in achieving timing closure, describe the importance of your HDL coding style, explain the importance of using Cores in your design, list the most effective implementation options that can help you. More Updated: Feb 2011 | Views: new |
 |
Achieving Timing Closure After completing this course you will be able to describe a flow for obtaining timing closure, interpret a timing report and determine the cause of timing errors, apply Timing Analyzer report options to create customized timing reports. More Updated: Feb 2011 | Views: new |
 |
Synthesis Options Learn how to identify synthesis tool options that can be used to increase performance and/or reduce your design size, describe an approach to using your synthesis tool to obtain higher performance and gain timing closure, use XST to get the most out of your HDL. More Updated: Dec 2010 | Views: 2,287 |
 |
XST Synthesis Options After completing this course on XST Synthesis Options you will be able to describe an approach to using XST synthesis options to obtain higher performance and gain timing closure, use XST to get the most out of your HDL. More Released: Feb 2011 | Views: new |
 |
Core Generator Software System Learn how to describe the differences between LogiCORE™ and AllianceCORE solutions, identify two benefits of using cores in your designs, create customized cores by using the CORE Generator software system GUI, instantiate cores into your HDL design, run behavioral simulation on a design that contains cores. More Updated: Feb 2011 | Views: 3,158 |
FPGA Power Videos
 |
Power Estimation Learn how to list the three phases of the design cycle where power calculations can be performed, estimate power consumption by using the XPower Estimator spreadsheet, estimate power consumption by using the XPower software utility. More Released: Sept 2009 | Views: 3,182 |
 |
How Do I Plan to Power My FPGA After completing this course on FPGA Power Management you will be able to explain why you should target as much of the hard IP as possible, describe how your designs power consumption is dependent on your use of control signals, explain how some common design techniques can improve your designs power consumption, use the newest architecture features to improve your designs power consumption. More Released: Feb 2011 | Views: new |
 |
What are FPGA Power Management Design Techniques After completing this course on FPGA Power you will be able to explain how static power is different from dynamic power, describe the impact a smaller device geometry has on static power consumption, define the relationship between leakage current and junction temperature, describe some of the device data sheet information that pertains to power consumption. More Released: Feb 2011 | Views: new |
 |
What are FPGA Power Management Software Options After completing this course on FPGA Power Management Software Options you will be able to explain some of the built in features that are already built into the ISE software, use the XST, MAP, and PAR options to manage power consumption. More Released: Feb 2011 | Views: new |
 |
What are the Power Requirements of My FPGA After completing this course on FPGA Power Requirements you will be able to describe your FPGAs power requirements, explain how power is used in an FPGA, explain how your power consumption depends on BOTH your design and the FPGA device you have chosen, justify how power consumption in an ASIC is different than an FPGA, explain why you need to manage your power consumption. More Released: Feb 2011 | Views: new |