Digital Signal Processing Curriculum Resources
Use System Generator for DSP and associated resources to develop labs covering fundamental and advanced digital signal processing courses.
Access System Generator for DSP Resources
System Generator for DSP includes blocksets useful for digital signal processing labs. Some of
of these blocks are implemented in hardware as IP (Intellectual Property) cores generated from
ISE Foundation's Core Generator for optimal results. Select IP Cores must be licensed. Refer to
the System Generator User Guide for a complete description of each block.
System Generator for DSP also includes a set of free reference designs. The table below lists
some example designs useful for digital signal processing.
| Reference Designs |
| Product Name/Type |
Description |
| Reloadable FIR Filter |
shows how to reload the 5-tap symmetric FIR with the
coefficient values of 7 8 9 8 7 |
| 2nd-order direct form I implementation |
shows two distinct FPGA implementations of a 2nd order IIR filter in Direct Form I, and compares them to the double precision Simulink IIR filter block. |
| Multi-channel, folded implementation |
Demonstrates how multiple IIR filters can be implemented using a single time-shared second-order section (biquad). |
Access useful Xilinx Application Notes
Xilinx application notes cover topics ranging from FPGA resource usage to application examples.
The links
below provide direct access to application notes for supported XUP board device families.
Access Teaching Materials
Access text books and materials for teaching courses using Xilinx.
Download Course Materials
Listed below are Universities that post lecture notes and/or lab exercises on their course websites
to share with the academic community.
Interesting Research Projects
Learn how Universities are using the latest Xilinx technology in research.
- WARP Wireless Access Research Platform developed by Rice University
Contact XUP
For general questions or comments, please send an email to xup@xilinx.com
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