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XUPV2P Reference Designs
Supported DIMM Memory Modules
 

XUPV2P Documentation

Below are documentation and QuickStart demos created for the XUP Virtex®-II Pro Development System  to demonstrate various features or capabilities. Documentation and source files are included.

NOTE: XUPV2P must not be used for new installations. To use this board, you must already be a current Xilinx development tools version 10.1 or earlier license holder.

Documentation and QuickStart Demos
Description Software Version Doc Files (PDF) Zip Files
User Manual   2.1 MB 1.8 MB
Board Schematics   1.6 MB 979 kB
UCF Files (user constraints files)     8 kB
Release Notes   90 kB 86 kB
Built-in-self-test (BIST)
A special design has been placed in the Platform FLASH PROM to provide a Built In Self Test (BIST) boot/configuration that tests critical board features and reports on board health and status. EDK 7.1 or later 26 MB
QuickStart Demos
EDK XUPV2P Pack
This QuickStart helps a new user to quickly become familiar with using the EDK Base System Builder to create a processor based design.
Requires EDK 10.1 SP3   8 kB
EDK Board Definition File (.xbd), Pcores, and drivers
    Previous version EDK 7.1 SP2 through EDK 9.1   305 kB
EDK Board Definition File (.xbd), Pcores, and drivers
Base System Builder
This QuickStart helps a new user to quickly become familiar with using the Base System Builder to begin a new EDK project.		 EDK 8.1 1.6 MB 655 kB
    Previous version EDK 7.1   1.5 MB
MicroBlaze uCLinux
This QuickStart demonstrates a port of the uClinux operating system to the Xilinx MicroBlaze™ soft-core, microprocessor, running on the XUPV2P Development System.		     9.2 M B
    Previous version     6.7 MB
Using High Speed Serial MGTs with the Aurora IP
This QuickStart demonstrates the use of the Xilinx Aurora Core to establish high speed data transfers using theVirtex-II Pro's MultiGitabit Transceivers, using the XUP-V2P Development System. 		    1.8 MB
Hardware CoSim with System Generator for DSP via USB
This QuickStart demonstrates the ability to perform Hardware Co-Simulation in System Generator for DSP, using the USB configuration port of the XUPV2P Development System. 		    9.2 MB
Audio Design with a Hardware Board Support Package
This QuickStart demonstrates the ability to generate standalone audio designs from System Generator for DSP targeting the XUPV2P development system. The key to this is an HDL wrapper that contains the interface logic to the audio CODEC. 		    1.8 MB
Audio Design with a MicroBlaze Board Support Package
This QuickStart demonstrates the ability to generate standalone audio designs from System Generator for DSP targeting the XUPV2P development system. The key to this is a MicroBlaze system that contains the interface logic to the Audio CODEC. 		    9.2 MB
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