Embedded System Design Flow using Zynq

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Course Description	This course provides professors with an introduction to embedded system design flow using ZedBoard evaluation and development board, and Xilinx Embedded Development Kit (EDK). Bus funcational model simulation verification is also covered.
Level	Introductory
Training Duration	2 days
Who Should Attend	Professors who are familiar with Xilinx FPGA technology and wish to get up to speed with FPGA-based embedded systems design using Zynq.
Prerequisites	Digital logic and FPGA design experience Basic experience with Xilinx ISE® Foundation™ software Basic understanding of C programming Basic microprocessor experience

After completing this training, you will be able to:

Rapidly architect an embedded system targeting a ARM processor of Zynq located on ZedBoard
Extend the hardware system with Xilinx provided peripherals
Create a custom peripheral and add it to the system
Write software code to access peripherals
Perform system level simulation verification

EDK Introduction
Lab 1: Basic Hardware Design
- Quickly create a ARM-based embedded system targeting Zynq.
Zynq Architecture
Adding IPs in Programmable Logic
Lab 2: Adding Peripherals in Programmable Logic
- Extend the hardware system by adding AXI peripherals from the IP catalog.
Creating Your Own IP Peripheral
Lab 3: Creating and Adding Your Own Custom Peripheral
- Use the Create/Import Peripheral Wizard to extend the system with a custom peripheral.

Software Development Environment
Lab 4: Writing Basic Software Applications
- Write a basic C application to access the peripherals.
Software Development and Debugging
Lab 5: Software Writing for timer and Debugging Using Software Development Kit (SDK)
- Use API to drive CPS's timer. Perform software debugging using SDK.
Bus Functional Model Simulation
Lab 6: BFM Simulation
- Use simulator to perform BFM simulation to verify the custom IP functionality.

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